orenderj

Im using a Digilent CSI DPHY block that pipes to the CSI to AXIS adapter. I then connect to a block that I monitor the stream and continue to pipe all the way through to the bayer block and out to HDMI. This works great. I've used it on a few boards without issue. I want to grab a single frame, so I monitor the frame start signal from the csi to axi stream block and when the new frame comes in, i send all the stream data to a fifo generator to solve the async clocking and then into the virtual fifo adapter that puts into DDR3. The problem is that the fifos clog up even when im using 65536 cascaded fifos before going into the big vfifo. Clocks are 200mhz. The vfifo doesnt do what I expect and I cant understand how to get the throughput or grab the raw untouched frame and save it somewhere to later manipulate. Are there any examples of using an any of the 7 series boards with DDR3, microblaze, mig, and virtual fifo to shuttle big chunks of data? If there is backpressure from the vfifo, the brams fill, and I lose bytes off the csi to axis stream.

Ah, youre awesome! Thank you so much for digging into this.

Hi @artvvb, Just following up on this. I tried your fixes and I'm still lost. I check the ILA and have some questions. The zero volt trigger you mentioned above works. I can slowly lower my signal from 1V down to 0V and it will trigger. When any values in the trigger level settings other than zero are applied, they dont seem to be the trigger value. It seems to still be zero. I can set UserRegisters_WriteReg(LevelTriggerPtr->BaseAddr, USER_REGISTERS_OUTPUT0_REG_OFFSET, Levels); to anything from 0x0000 to 0xFFFF for each channel u16 in that u32. If I check the ILA, the trigger fires on bit 3 showing a falling edge channel 1. My trigger was set to some high value, although Im still not sure what that unit is. Is it ADC counts? Signed millivolts? Anyway, If you see the two virtual busses from the AXI stream, the values are ranging from 0x0000 to 0xFFFF and I am inputting a -20 to 20mV sine wave. Wondering if you can elaborate slightly on the trigger value settings and I think that if I can understand that, I'll be in the clear. Thanks again!

Thanks @artvvb. I actually found that using the WaveForms SDK and the Eclypse Z7 that I can capture the samples that I need to bring into a custom C# application, but I'd really like to be able to do the same thing with your trigger example code as I can modify the block design quite easily and insert some signal processing modules along the way. The trigger code is very useful in theory, but I havent been able to get it to work. The manual trigger always fires even if I'm basically at 0v and have a terminator on the SMA with a rising edge trigger way above my signal. If you expect some bug fixes soon, I'll continue using the SDK to get me going, but if not, I'll take your information from the post above and try and get things working. Thanks again!

Is the block design for the Eclypse and Waveforms open or closed source?

I am using the DDR streaming example and trying to understand the trigger scheme and get it to work. It seems that regardless of the value that I place into LevelTriggerAcquisition (&Pipe, GainTestRelays, 0b00011, 0x0100, 0x0100); that the hardware will trigger. I removed the manual trigger up in the leveltrigger function as well. Is there an example demonstrating the use of the trigger block? For example, I'd like to trigger on the rising edge of a waveform as a test. I'm not following the flow of the trigger setup in terms of waiting for idle, setting up, start, etc.