DmDerev

P.S. The "secret" is explained in detail by Xilinx in Appendix E of User Guide UG908: https://docs.xilinx.com/r/en-US/ug908-vivado-programming-debugging/JTAG-Cables-and-Devices-Supported-by-hw_server For FTDI devices to be recognized as a USB-to-JTAG interface in Xilinx® JTAG software tools such as XSDB or the Vivado® Hardware Manger the EEPROM on the FTDI device must be programmed with a custom firmware provided by Xilinx. Programming the FTDI is accomplished by using the program_ftdi utility included in the Vivado install as a Tcl command. Once programmed, the FTDI device will be recognized as a valid programming cable in Vivado. Note: For on-board implementation details including FTDI connectivity, please reference the Xilinx VCK190 Schematics available in XTP610 on https://www.xilinx.com/products/boards-and-kits/vck190.html. The program_ftdi utility supports the following FTDI devices: • FT232H • FT2232H • FT4232H The "program_ftdi" utility may be used to read out configuration information from the board/cable. When used with read, the command reads back the content of FTDI EEPROM to standard out. if -fileout option is used, the read back information is written to the file specified. The connection is using ABUS0..ABUS6 for JTAG signals, sensing the power and resetting the board. The pin assignment for JTAG interface and the descriptions of the signals are shown in Table 3.7 of FT2232H and FT4232H datasheet. Again, it is a shame that the board intended to help Xilinx in selling their products attempts to confuse users by hiding the information.

In my humble opinion, the board intended for makers and coming from what sometime ago was a reputable company should come with complete and accurate schematics. If it is ("surprise") missing, it does not improve the reputation, it actually says that the users may have more troubles in troubleshooting if a problem happens. I did not pay attention to a missing page before I tried to create a top level Verilog file for my design and needed to check what is the direction of UART_TX_IN and UART_RX_OUT? Are they "in" and "out" from UART of FPGA view? These signals are always confusing because there is no standard notation there. I searched the schematics to find that these signals do not go anywhere, and it was the reason to say s*... I do not take the arguments about "IP" below. For majority of customers, the only reason to buy Digilent boards is to avoid headache of building custom boards which does not justify effort in low volumes. For such customers Digilent creates unjustified additional difficulties and diminishes the value of buying from Digilent.

I built the "shield" board for relatively high speed on the mezzanine connectors (~50-60MHz signals) and discovered that the main board has actually 220 Ohm resistors in series with all pins. When I looked at schematics, the values were shown as 220 (which on SMD resistors mean 22 Ohm - pretty usual and benign value for series termination on traces). But measurement shows 220 Ohm and as the result, the design does not work. It is inconvenient to rework all boards (I have few) and replace these 0402 resistors with jumpers. I am wondering what was the designers' train of thought when volume producing the boards which don't work with many practical signals? Even if the idea was to protect the I/O pins, it was not a great idea as using this relatively decent high speed chip is not possible without rework of the board!

Is there a schematic of the circuit driving UART_TXD_IN and UART_RXD_OUT? Cannot find it in the provided schematics. Is the UART_TXD_IN the output of FPGA and input of USB Serial interface - or it is opposite? The direction of serial ports and naming conventions are always misleading, and having no schematic is a reason for user disappointment!!! It is a shame that the board intended for makers/experimenters has incomplete schematics.

Tried to create an account and pass the "not a robot test" recently. I could not understand these puzzles with word manipulation instructions, "take fourth word in next sentence...." - not sure what they call a "word" - does it include articles, etc...? Anyway, 5 of available variants failed. Is the intent of it is to double frustration of the user? Shame on (long time ago) good company!!!!

Yes, the DXF import allowed to measure distance and confirm that the design copied the "Arduino" placement bug. However, the distance measured from this file is 158.56 mils between pins of the connectors (although allegedly it should be 160mils ). In my humble opinion, providing more friendly data (like locations of pin 1 of mating connectors) in a form of a table or in gerber or drill file will be much better and simplify the job of design engineers using Digilent products. Hope you can pass this message as a suggestion to technical marketing.

Hello, I was looking for files showing placement of connectors of "Arduino" section on Arty A7 board. Ideally, a gerber file of any layer or mechanical layer or drill file would work. The requested information is the placement of pin 1 on all 100 mil user access connectors. There is a mechanical drawing in documentation, but not all required dimensions are shown there. Alternatively, a blank hat card CAD board file in any popular CAD format would be very helpful. The reason for the request is the "off-grid" mistake in the connector placement done by early Arduino designers, later some boards did not replicate the mistake and placed connectors on 100 mil grid, which made them mechanically incompatible. Please provide the requested information.