tarrahm

Hello I am using the dvi2rgb IPCore on my custom board to get 1024*768 DVI input. I have revised the EDID and I am correctly receiving XGA video from my PC. when I change the DVI sender to the xilinx evalution ZC702 that has a ADV7511 as transmitter, we cannot receive XGA video from ZC702 correctly. when I was debugging the Data Enable, H sync and V sync output signals of the dvi2rgb IPCore , i saw unwanted rising and falling of this signal compare with correct pattern. when I did detailed debug , the 10bit output of ISERDESE2 of TMDS Decoder was not based correct pattern. I tested the xilinx evaluation ZC702 with standard monitor and it worked correctly.