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Joe306

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Posts posted by Joe306

  1. Hello, I am using a custom board with a Versal Prime FPGA. I am using the JTAG-SMT2-NC to connect to the FPGA. I want to know if there are any instructions on how to add this hardware in Vitis? Also, is there any driver software I need to download in order for the OS to recognize the JTAG-SMT2-NC?  Do I need to be Administrator on my Win10 OS for it to install any drivers?

    USB_fail.png

    Target_Connections.png

  2. Hello, I was looking over AM011 Versal documentation on page 716 they have:

    The Versal ACAP has just one dedicated reset pin, POR_B. This pin asserts the external power-on
    reset, External_POR. The Versal device does not include the Zynq® UltraScale+™ MPSoC
    PS_SRST_B reset pin.

    Would it be possible to tie the POR signal from the Reset Switch into the Open Drain Buffer?

    Take a look at the attachment and let me know your comments please.

     

    Respectfully,

    Joe

     

    VIB 42.pdf

  3. Hello, I'm using the JTAG-SMT2-NC device to add the ability to program a Zynq Ultrascale+ MPSoC fpga. I have following Figure 11 from the datasheet. I have attached my schematic. Can anyone take a look at it and see if I have things correct concerning the connections to the FPGA and JTAG Cable Header? I want to be able to program the FPGA over mini-USB or the JTAG programming pod.

     

    Thank you

    Joe

    VIB 42.pdf

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