Joe306

Hello, can you please tell me the power consumption for the JTAG-SMT2-NC. Thank you

Hello, I am using a custom board with a Versal Prime FPGA. I am using the JTAG-SMT2-NC to connect to the FPGA. I want to know if there are any instructions on how to add this hardware in Vitis? Also, is there any driver software I need to download in order for the OS to recognize the JTAG-SMT2-NC? Do I need to be Administrator on my Win10 OS for it to install any drivers?

Hello and thank you for responding to my post. My operating system does not recognize the programming module. Is there a device driver that I need to download and install? Do I need any pull-up resistors on TDO, TCK, TMS and TDI?

Hello, can you please tell me if the JTAG-SMT2: Surface-mount Programming Module is compatible with the Versal ACAP? I will include my schematic for your review? VIB_Mods 50.pdf

Hello, I'm looking at the datasheet for the JTAG-SMT2-NC (410-308-B) and I can't find the power consumption. Can any one help me please. Thank you

Hello, I think I have the solution. I will use an Open Drain Buffer and tie the resets together and then use a Header to select which resets are tied together.

Hello, I was looking over AM011 Versal documentation on page 716 they have: The Versal ACAP has just one dedicated reset pin, POR_B. This pin asserts the external power-on reset, External_POR. The Versal device does not include the Zynq® UltraScale+™ MPSoC PS_SRST_B reset pin. Would it be possible to tie the POR signal from the Reset Switch into the Open Drain Buffer? Take a look at the attachment and let me know your comments please. Respectfully, Joe VIB 42.pdf

Hello, on the JTAG header pin 14 what would that connect to on the Versal? Thank you very much, Joe

Hello, I'm looking to use the new Versal ACAP VM1802 with the JTAG-SMT2-NC device. The Versal does not have a PS_SRST_B pin. I am not sure how to connect pin 14 on the JTAG connector to the Versal. Can you please help me? Thank you Joe VIB 42.pdf

I've made some changes to the schematics so it matches Figure 11 page 8 of the JTAG-SMT2-NC. Hopefully I don't have any errors. Thanks VIB 42_08132021.pdf

Hello, I'm using the JTAG-SMT2-NC device to add the ability to program a Zynq Ultrascale+ MPSoC fpga. I have following Figure 11 from the datasheet. I have attached my schematic. Can anyone take a look at it and see if I have things correct concerning the connections to the FPGA and JTAG Cable Header? I want to be able to program the FPGA over mini-USB or the JTAG programming pod. Thank you Joe VIB 42.pdf