Eric888
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Posts posted by Eric888
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I want to add an optical fiber module to NexysVideo, and add the following settings in the Constraint file:
set_property PACKAGE_PIN C9 [get_ports GT_RX_0_N]
set_property PACKAGE_PIN D9 [get_ports GT_RX_0_P]
set_property PACKAGE_PIN C7 [get_ports GT_TX_0_N]
set_property PACKAGE_PIN D7 [get_ports GT_TX_0_P]
The following error occurred after compilation,[DRC UCIO-1] Unconstrained Logical Port: 2 out of 79 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: GT_TX_0_P, and GT_TX_0_N.
Attach screenshots of NexysVideo and TopFile
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19 hours ago, Mario875 said:
Have you tried programming directly using the JTAG interface on jumper J17? If you have that option it would be my next port of call to rule out the USB - JTAG interface.
Looks like xsct can see the board, but with errors on the JTAG boundary scan. Take a look at some of these threads....
Looks like you need to verify the JTAG TMS, TCK, TDI & TDO lines are all in the the correct states and being pulled up properly with the proper voltages, etc. The issue could also be the NC7SZ66P5X which is a bus switch that the TDI & TDO lines go do, presumably to allow interface either via the FMC connector or via normal JTAG header.
However, just incase it is something this simple, you have double checked all the jumpers on the board are in the correct position, yes? Not set for say direct JTAG interface programming when you are trying to program over the USB or anything?
If the jumpers are all correct then it's time to sit down with the board, schematic and an oscilloscope / test gear to find the fault (which could still be under the FPGA on the BGA connections).
Schematic can be found here... https://reference.digilentinc.com/_media/reference/programmable-logic/nexys-video/nexys_video_sch.pdf
Thanks @Mario875,The problem has been solved, the problem is that ic1 NC7SZ66P5X is missing!
Yes,I tried programming directly using the JTAG interface on jumper J17 that is same as USB-JTAG.
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On 7/24/2021 at 10:48 PM, Mario875 said:
Hopefully that will fix the issue. If it does, please let us know.
It does not work:(.
I use xsct command "connect" and "targets",The “targets” command did not reply to any messages.
xsct% connect
tcfchan#2
xsct% targets
xsct%
I used "jtag targtes" and it responded with errors.
xsct% jtag targets
1* Digilent Nexys Video 210276019386B (error DR shift through all ones)
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30 minutes ago, JColvin said:
Yes, I sent you a PM.
Thank you very much！
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1 hour ago, JColvin said:
Hi @Eric888,
Oh, I didn't realize there was such an adapter available from Xilinx. Using J17 (the unloaded 6-pin jtag header) should not interfere with J12; you can simply leave the micro USB connector on J12 not attached. It's purpose was to provide the USB to JTAG connection circuitry, but if you already have that functionality through the Xilinx Platform cable, then J12 is not needed.
Let me know if you have any questions.
Thanks,
JColvinI have Issue about “How to restore FT2232 EEPROM back to factory settings?” and I leave a message on the thread
could you send a PM for me？
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10 hours ago, zygot said:
Replacing the FPGA on a cheap board with a faster grade part is rather extreme; certainly not cost effective. Be aware that there are unexpected issues that might crop up when trying to push a board beyond the original design capabilities. These things aren't PC motherboards. Perhaps it's work out fine; perhaps not.
Did the company that did the work supply proof of connectivity, like xray scans? Do they guarantee their work?
It is used to make prototypes, not production. If it is feasible, it can save us time for proof of concept. If it is not feasible, then we will find other solutions for prototype.
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13 hours ago, Mario875 said:
The FTDI firmware should not be a problem, because it is the exact same FPGA, just a higher speed grade. All the pins for the JTAG will be the same as the original FPGA.
Is it possible that the company you sent it to tried to update the FTDI firmware? I have read that the FTDI software can erase the Digilent firmware without warning when you open their software with the Digilent board connected. Maybe this happened?
There is an dedicated thread about restoring FTDI firmware here...
Maybe @JColvin can detail the method required to restore the FTDI firmware for the Nexys video. That is what I would do first. Restore the firmware back to factory and then see what happens.
@Mario875Thanks very much！ I leave message to @JColvin on the thread that you provided. Waiting to get a PM.
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7 hours ago, JColvin said:
Hi @Eric888,
The Xilinx Platform Cable USB II is a 2x7 connector rather than the 1x6 header that is present on the Nexys Video. So you would need an adapter that accounts for the pin orientation changes if you wanted to use the Platform Cable, though I haven't seen such an adapter that also accounts for the difference in pin layout.
If you are just wanting to connect to the board to load designs, you can use a micro USB cable (that isn't charging only) on header J12. Serial/UART communications are available through a second micro USB connector on J13.
Let me know if you have any questions.
Thanks,
JColvinXilinx platform cable II have an JTAG flying wiring adapter cable(see image),I want to use it to replace J12 function, will it conflict with the function of J12? Because there is no circuit diagram of this part in NexysVideo Schematic.
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Does Nexys Video support Xilinx Platform Cable USB II via J17 JTAG cnnector or Only support Digilent JTAG HS2？
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On 7/22/2021 at 3:10 PM, Mario875 said:
When you say you replaced the FPGA, do you mean you actually de-soldered the original one and soldered a new one?
If so there are a couple of things to query, such as how was this done (as in what tools / method were used)? Are you sure there have been no pads lifted when the old FPGA was lifted? Are you sure the new FPGA is soldered properly with no bridges, making good contact to the pads on the board, etc?
Also, I suppose the bigger question is...where did you manage to source the new FPGA? Was it from a reputable retailer or someone on Ali-Express? As I have just done a quick check and this particular FPGA is one of the many which currently has a lead time into 2022 from places like Farnell, DigiKey & Mouser. So if you sourced it from Ali-Express it could be one which has issues and failed QC, hence was never sent onto reputable distribution centres.
Honestly, if you have installed a new BGA to the board, you are effectively on your own with this one. Obviously there are users here willing to help, but I would not expect Digikey reps to be much help as you will have well and truly voided any warranties and introduced a change which has not been tested by them and not to mention the very high possibility the issues you are encountering are self-induced in the sense that it could very well be an issue with the removal & installation of the BGA packages.
Yes, I de-soldered the original one and soldered a new one. I sent it to SMT facotry they did it for me.
After replaced,The HDMI output,DISP1 output and all buttons and Leds is worked,I think the FPGA may be not an issue.
Is it possible that FTDI's firmware does not support it?
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I bought a NexysVideo and try to replace XC7A200T-1SBG484C with XC7A200T-2SBG484C.
After replaced it, The Color bar can display, but there is an error message when I using xsct to connect and using "targets" command via usb prog port.
the error message is "1 whole scan chain (ftdi_write_data_submit failed: usb bulk read failed)".
Does the USB->JTAG not support XC7A200T-2SBG484C or other issues ？
NexysVideo -- [DRC UCIO-1] Unconstrained Logical Port
in FPGA
Posted
Thank you for the information.
The problem is found.
I use the 7 series FPGAs Transceivers Wizard IP in the project. It may be incorrectly set to cause an error in the synthesis of the IP. It is not a problem with the constraint setting.
After I adjusted the 7 series FPGAs Transceivers Wizard IP settings, it can generate bitstream.