Eric888

Thank you for the information. The problem is found. I use the 7 series FPGAs Transceivers Wizard IP in the project. It may be incorrectly set to cause an error in the synthesis of the IP. It is not a problem with the constraint setting. After I adjusted the 7 series FPGAs Transceivers Wizard IP settings, it can generate bitstream.

I want to add an optical fiber module to NexysVideo, and add the following settings in the Constraint file: set_property PACKAGE_PIN C9 [get_ports GT_RX_0_N] set_property PACKAGE_PIN D9 [get_ports GT_RX_0_P] set_property PACKAGE_PIN C7 [get_ports GT_TX_0_N] set_property PACKAGE_PIN D7 [get_ports GT_TX_0_P] The following error occurred after compilation, [DRC UCIO-1] Unconstrained Logical Port: 2 out of 79 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: GT_TX_0_P, and GT_TX_0_N. Attach screenshots of NexysVideo and TopFile

Thanks @Mario875,The problem has been solved, the problem is that ic1 NC7SZ66P5X is missing! Yes,I tried programming directly using the JTAG interface on jumper J17 that is same as USB-JTAG.

It does not work:(. I use xsct command "connect" and "targets",The “targets” command did not reply to any messages. xsct% connect tcfchan#2 xsct% targets xsct% I used "jtag targtes" and it responded with errors. xsct% jtag targets 1* Digilent Nexys Video 210276019386B (error DR shift through all ones)

Thank you very much！

I have Issue about “How to restore FT2232 EEPROM back to factory settings?” and I leave a message on the thread could you send a PM for me？

It is used to make prototypes, not production. If it is feasible, it can save us time for proof of concept. If it is not feasible, then we will find other solutions for prototype.

@Mario875Thanks very much！ I leave message to @JColvin on the thread that you provided. Waiting to get a PM.

Hi, @JColvin I'm using Nexys Video. Please tell me how to restore it. Thanks

Xilinx platform cable II have an JTAG flying wiring adapter cable(see image),I want to use it to replace J12 function, will it conflict with the function of J12? Because there is no circuit diagram of this part in NexysVideo Schematic.

Does Nexys Video support Xilinx Platform Cable USB II via J17 JTAG cnnector or Only support Digilent JTAG HS2？

Yes, I de-soldered the original one and soldered a new one. I sent it to SMT facotry they did it for me. After replaced,The HDMI output,DISP1 output and all buttons and Leds is worked,I think the FPGA may be not an issue. Is it possible that FTDI's firmware does not support it?

I bought a NexysVideo and try to replace XC7A200T-1SBG484C with XC7A200T-2SBG484C. After replaced it, The Color bar can display, but there is an error message when I using xsct to connect and using "targets" command via usb prog port. the error message is "1 whole scan chain (ftdi_write_data_submit failed: usb bulk read failed)". Does the USB->JTAG not support XC7A200T-2SBG484C or other issues ？