mete

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mete reacted to attila in sync mode with trigger January 6, 2023

Hi @mete
ref clock 10-50MHz to 50-125MHz sys clock
mete reacted to attila in sync mode with trigger January 6, 2023

Hi @mete
The Sync in Logic Analyzer uses the Trigger resources for sampling, so in this mode the trigger is not available.
With AD2, ADP3X50... you could use the Scope (with Digital signals) to have Trigger IO as sampling clock and also specify a trigger condition.
With ADP3X50 you can use a Trigger IO as reference cock IO.
The old EExplorer has a dedicated digital clock input.
mete got a reaction from attila in changing VCCIO_PROG on digital discovery January 4, 2023

Thanks I think I managed