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TOIVI

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Posts posted by TOIVI

  1. Hi @attila

    When using the UART protocol decoder of the logic analyzer tool, the decoded waveform is correct, but the h00 byte is detected as a "Break" trigger condition.

    Configuration:
    DIO0 UART TX, auto standard rate (19.2110656 kbps).
    Trigger source: DIO0 Protocol/Break

    (The measured length of the low signal level is 469.3 us.) 


    The same thing happens when DIO0 UART TX is configured to Manual rate, 19.2 kbps.

    Break.jpg

  2. On the attached picture, the Math1 channel displays the secondary ignition waveform of a V8 engine, with the automotive quick measure "Cylinders".  (Math1 = -1*C1. The trigger source is cylinder 1, on the C2 channel.)
    In a four-stroke engine, two crankshaft revolutions are required to ignite all of the  cylinders, so the displayed RPM (340.8) is the half of the real engine speed.

    D10b.jpg

  3.  

    Great! Using the native support, the user can connect the oscilloscope tool directly to the vehicle bus,  digitize the signal in mixed mode and decode protocol, eliminating the need for external voltage divider.
    (Yes, this unusal bit encoding  is used in J850 VPW. Passive Level Short Pulse = 0, Passive Level Long pulse =1, Active Level Short Pulse =1, Active Level Long Pulse = 0.)

     

  4. 3 hours ago, attila said:

    Edit:
    Instead of:
    if ((Symbol == 7) || (Symbol == 7)){ //SOF or EOD
    you probably wanted:
    if ((Symbol == 6) || (Symbol == 7)){ //SOF or EOD

    Exactly.
    I used real bus traffic (with simulated  glitches) to test the decoder. The GM bus I used does not require "in-frame response" (sending bytes after EOD). Probably that's why this bug is not detected by me.

  5. I wrote a protocol decoder for the SAE J1850 VPW bus that can be used in WaveForms' Logic Analyzer. I share it.
    The decoder works on the DIO 0 channel. It decodes frames and can display bytes (if the DiplayBytes variable is set to true).
    I also attach a csv file containing a test sample recorded from a working bus. (This pattern should be imported into the Samples tool for the DIO 0 channel at 346021 Hz.)
    Note that the J1850 VPW bus uses a level higher than 5V. Do not connect the input of the logic analyzer  directly to the bus. 

    Screen.jpg

    J1850_VPW.txt J1850_VPW_DIO_0.csv J1850_VPW_V2T.txt

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