This parameter is taken to line 118, where it is fed into the ClockGen. It is interesting that the comment there says that the ClockGen can actually take 5 options
And finally, inside the ClockGen.vhd file line 36 declares the parameter kClkRange, and confirms that it can take 5 options. But whatever is declared here is superceded by what is declared in the top module
So although the ClockGen clearly has five options,it seems that the IP itself is limited to three. Can someone please explain why and what will happen if I write '5' for kClkRange?
2) I now have to take these design files and add them to a new project in Vivado.
I see that in the src folder of the IP, there are also three xdc files, and two of them actually have real code in them. What should I do with them? I plan on using a different xdc file to assign the pins on my board.
Question
dgottesm
I have two questions
1) According to Digilent documentation, the rgb2dvi IP is designed to take a minimum pixel clock of 40 MHz.
My video data is at 27 MHz, so it seems to me that I will have to go into the original source code and try to make it work for a lower pixel clock
When I open the src folder of the IP, I open the rgb2dvi.vhd, which is the 'top module'. From there, all the parameters are taken.
See line 66- There are 3 options given
kClkRange : natural := 1; -- MULT_F = kClkRange*5 (choose >=120MHz=1, >=60MHz=2, >=40MHz=3)
This parameter is taken to line 118, where it is fed into the ClockGen. It is interesting that the comment there says that the ClockGen can actually take 5 options
kClkRange => kClkRange, -- MULT_F = kClkRange*5 (choose >=120MHz=1, >=60MHz=2, >=40MHz=3, >=30MHz=4, >=25MHz=5
And finally, inside the ClockGen.vhd file line 36 declares the parameter kClkRange, and confirms that it can take 5 options. But whatever is declared here is superceded by what is declared in the top module
kClkRange : natural := 1; -- MULT_F = kClkRange*5 (choose >=120MHz=1, >=60MHz=2, >=40MHz=3, >=30MHz=4, >=25MHz=5
So although the ClockGen clearly has five options,it seems that the IP itself is limited to three. Can someone please explain why and what will happen if I write '5' for kClkRange?
2) I now have to take these design files and add them to a new project in Vivado.
I see that in the src folder of the IP, there are also three xdc files, and two of them actually have real code in them. What should I do with them? I plan on using a different xdc file to assign the pins on my board.
Link to comment
Share on other sites
3 answers to this question
Recommended Posts
Archived
This topic is now archived and is closed to further replies.