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Is the Nexys 4 DDR to SRAM component really that slow?



Hi all,

I am creating a custom CPU on the Nexys 4 DDR. At 100 MHz system clock, it executes commands at about 20 MIPS on average. I used async SRAM in past, this was a piece of cake as the SRAM was always faster than my CPU. But now, being on the Nexys 4 DDR, I'd like to leverage the on board DDR RAM.

Having a look at Mihaita Nagy's DDR to SRAM component (link: https://reference.digilentinc.com/nexys4-ddr:sram) I was a bit surprised: On the reference page you can read, that an async. read operation of a single data word takes 210ns. Is this realistic or maybe a typo? 210ns means that the max read speed would be 4,76 MHz. This seems to slow to be true. So did I maybe get something wrong (I am a pretty new to DDR RAM topics therefore this might be the case). If I did not get it wrong: Just being curious: Why is it so slow?

Are there faster ways to work with the DDR RAM?

Thank you and best regards


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Hi Mirko,

From what I understand of Mihata's code, the RAM2DDR module was created to interface with the DDR like you would SRAM. It is designed to send only one 16bit word at a time using masks. You can send up to 64bits of data at a time (or 128bits with PHY to controller clock ratio at 4:1) using the MIG interface.

Lets say you are working with 64bit bursts:

  • Your ram_dq_i and o will be 64 bits
  • You will set the data mask (wdf_data_mask) to all 1's (or disable it in the MIG settings)
  • You will change how the addressing works. Mihaita does some bit manipulation to simulate 8bit addresses (it actually writes to the same address with different bit masks). In our case, we would simply send the 64 bit data (with wdf_data_mask set to all 1's, it will send the full 64bits).

DDR memory is better used when you burst read or write, rather than reading/writing one 16bit word at a time.


Hope this helps!


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