Basys 3: Error when implementing project

[andrew241]

I have a problem when trying to implement a VHDL project (ALU and register file) onto a Basys 3 board. This is the error message I get from Vivado:

 

[Place 30-58] IO placement is infeasible. Number of unplaced terminals (32) is greater than number of available sites (12).

 

The register file is 16-bits, and has one write (in) and two read ports (out). The ALU operates on the values from these two read ports, and the result is output to the 16 LEDs. Is this project something that can't be implemented on this board due to the lack of available resources, or is this a problem with the Vivado software?

 

Thanks!

[jamey.hicks]

Do you have location constraints for those ports? I think that message usually just means you haven't assigned locations.

[andrew241]

Going over the top level VHDL file, it looks like all the read ports from the register file are outputs. They are not assigned to any locations.

[andrew241]

That was the problem. The VHDL code I was given had the read ports as outputs for test purposes, but they weren't connected to anything.

 

Thanks for the tip!