I am developing a back-end with a AD9467 ADC, Zedboard Zynq-7000 connected to a PC through ethernet. The ADC samples at 500 MB/S. The ZedBoard carries 512 MB of DDR3 memory.
I would like to build hardware and software to stream data gaplessly, from the ADC to the PC. I am walking through some guides with repositories to help me set this up (linked). What are the trade-offs to streaming data that I should expect to incur? How much would my data rate suffer in order to set up a continuous pipeline from ADC to PC?
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jojohwa
I am developing a back-end with a AD9467 ADC, Zedboard Zynq-7000 connected to a PC through ethernet. The ADC samples at 500 MB/S. The ZedBoard carries 512 MB of DDR3 memory.
I would like to build hardware and software to stream data gaplessly, from the ADC to the PC. I am walking through some guides with repositories to help me set this up (linked). What are the trade-offs to streaming data that I should expect to incur? How much would my data rate suffer in order to set up a continuous pipeline from ADC to PC?
https://wiki.analog.com/resources/fpga/xilinx/fmc/ad9467
https://github.com/viktor-nikolov/lwIP-file-via-socket
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