I'm using Vivado version 2023.2, and new at FPGA and Xilinx and Digilent development, could someone comment on this and a work around to use a Pmod AD5?
Also is Digilent working to update their IP for Pmod devices so that we can use it for later versions of Xilinx Vivado / Vitis?
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themightyprogrammer
This link shows a message that says "Digilent Pmod IPs are only supported in Vivado and Xilinx SDK versions 2019.1 and earlier"
https://digilent.com/reference/learn/programmable-logic/tutorials/pmod-ips/start
I'm using Vivado version 2023.2, and new at FPGA and Xilinx and Digilent development, could someone comment on this and a work around to use a Pmod AD5?
Also is Digilent working to update their IP for Pmod devices so that we can use it for later versions of Xilinx Vivado / Vitis?
Thank you.
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