Why can't connect output of RTL module to AXI gpio output that is connected to LED

[tulamba]

I am using Vivado 2023.1 and I am not able to connect the output of RTL module to AXI GPIO output that is connected to LED. Please see attached. RTL is below

 

module led_blinker (
    input wire sysclk,
    input wire rst,
    output reg led
);

    reg [26:0] counter;
    reg led_state;

    

//TO make reset signal work with PS, make sure it is negedge reset
    always @(posedge sysclk or negedge rst) begin
        if (~rst) begin
            counter <= 27'd0;
            led_state <= 1'b0;
        end else begin
            if (counter == 27'd99999999) begin  // Adjust for desired blink rate
                counter <= 27'd0;
                led_state <= ~led_state;
            end else begin
                counter <= counter + 1'b1;
            end
        end
    end

        always @(*)
     begin
        led = led_state;
    end

endmodule

 

[Viktor Nikolov]

I think you can't have a port driven from two sources.

If you need to control the LED from both the AXI GPIO and RTL module, you need to add an OR logic block: IP Catalog|BaseIP|Utility Vector Logic.

[tulamba]

On 9/15/2024 at 5:43 AM, Viktor Nikolov said:

I think you can't have a port driven from two sources.

If you need to control the LED from both the AXI GPIO and RTL module, you need to add an OR logic block: IP Catalog|BaseIP|Utility Vector Logic.

Thanks so much. Let me try that