Oscilloscope for Nexys 4

[jc2694]

Hello,

 

I am currently constructing a numerically controlled oscillator or DDS out of the Xilinx Nexys 4 FPGA. I was wondering what is the maximum bit rate output of the board would be so that I can purchase an oscilloscope to match that. Sofar the documentation that I have found does not explicitly state that. If someone on this forum would be able to assist me that would be wonderful.

 

Thank you,

 

Jean-Christophe

[hamster]

Hi JC2694,

 

The short answer is you want to get the best scope that your budget allows. 

 

But for a more complete answer, the document you want is http://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf - in particular table 15.

 

   "DDR LVDS transmitter (using OSERDES; DATA_WIDTH = 4 to 14) is between 960Mb/s and 1250Mb/s, depending on speed grade."

 

However, you are very unlikely to use these speeds (or be able to afford a Oscope that can work at them). There are tools like Xilinx's ChipScope that allow you to see what the signals look like on the inside of the the FPGA.

[sbobrowicz]

FYI, The Nexys4 has a speed grade 1 part, meaning that the maximum transmission rate of the OSERDES core is 960 Mbps (as hamster cited).

 

Another note: the only differential output standard supported by the Nexys4 is TMDS33, because the banks are all powered to 3.3V. The only other option is single-ended signaling. Depending on your design, this probably puts your realistic output signaling rate well below 200 MHz.

 

--Sam