About Eclypse Z7 with Zmod Scope 1410-105

[kuyd2233]

Hello.
I tried all the example projects related to eclypse z7 provided by digilent.
Since then, I have been studying using Zmod Scope IP (ZmodscopeController_v1_0) and Zmod DAC IP (Zmod AWGCController_v1_0) provided by Digilent.
However, I have confirmed that 2-channel adc using Zmod Scope 
 is not being processed at the same time.
Document about Zmod Scope IP also indicate that CHA and CHB are processed sequentially, but not simultaneously.
I want to process 2-channel ADC using Zmod Scope at the same time, what should I do?

[artvvb]

Hi @kuyd2233

There might be a misconception here, but please correct me if I'm wrong. The ADC on the Zmod Scope samples on the rising edge of the clock signal. Data is interleaved in a double-data-rate clocked serial bus when it is sent back to the FPGA, which might be what you are looking at in the Scope Controller manual. The thing that matters for interpretation of the data after it comes out of the Zmod Scope Controller is that channel A and B were sampled at the same time, regardless of how that data was formatted during the transfer. The Zmod Scope Controller accounts for this encoding and makes sure that the data from the two channels is re-parallelized.

There's some more information on this in the Theory of Operation section of the AD9648 Datasheet, starting on page 24.

Thanks,

Arthur