DeanG Posted October 11, 2022 Share Posted October 11, 2022 I have older SF3 PMODs with a date code of 16 34 that I have been using without issue. I have ones purchased recently that seem to misbehave. Date code 22 08. Doc with more details and waveforms attached. PMOD SF3 issue.docx Link to comment Share on other sites More sharing options...
0 JColvin Posted October 13, 2022 Share Posted October 13, 2022 Hi @DeanG, I am taking a look into this; I am not personally aware of any hardware changes that have been made to the Pmod SF3 onboard flash, though I have not gotten a new module in several years so I only have two modules with Micron components. What does the silkscreen on your newer version of the Pmod SF3 look like? Thanks, JColvin Link to comment Share on other sites More sharing options...
0 DeanG Posted October 14, 2022 Author Share Posted October 14, 2022 Thanks for looking into this. Here is a picture. Link to comment Share on other sites More sharing options...
0 DeanG Posted October 20, 2022 Author Share Posted October 20, 2022 Hi @JColvin Any ideas on what is going on. From the code RW164, the device appears to be MT25QL256ABA8ESF so this device would have #reset and #hold pins. I have verified that both are held high. Still can't determine why it doesn't respond correctly. Link to comment Share on other sites More sharing options...
0 DeanG Posted October 28, 2022 Author Share Posted October 28, 2022 Any help folks? Link to comment Share on other sites More sharing options...
0 JColvin Posted October 28, 2022 Share Posted October 28, 2022 I am still taking a look into this; I have not gotten the opportunity to take a look as of yet. I'll make sure to order a more recent production version of the Pmod SF3 though I was assured that no drastic hardware changes have been made. Thank you, JColvin Link to comment Share on other sites More sharing options...
0 DeanG Posted November 15, 2022 Author Share Posted November 15, 2022 I'm still working it as well. I'll let you know if I figure something out. Link to comment Share on other sites More sharing options...
0 JColvin Posted November 30, 2022 Share Posted November 30, 2022 Hi @DeanG, I finally got the new Pmod SF3's into the office with the matching date code (or whatever it is) of 2208 on the backside of the Pmod. With that, I was able to find some good news and bad news, which I'll do my best to be brief about, though that's unlikely. I didn't directly test the enhanced volatility register (I instead used Digilent's existing demo the Pmod SF3, https://github.com/Digilent/vivado-library/tree/master/ip/Pmods/PmodSF3_v1_0/drivers/PmodSF3_v1_0), but curiously it was the 1624 version of the module that seemingly got stuck failing to read Status register, much like you described for the 2208 version for you. Both the 2208 and 1816 versions worked without issue for me. I did note that you mentioned in your document that for the Pmod SF3 with the code of 2208 that after reading the ID code you mentioned that reading the Enhanced Volatile Configuration Register via 65h was reading back as FFh which you indicated was incorrect. I took a look at the corresponding datasheet for the flash chip (FBGA code of RW164, MT25QL256ABA) and best that I could tell from Table 12 on page 33 that the read back code of FFh was correct based on the listed default values. This discrepancy in what you expected (and were successfully doing) along with my own experience lead me to more thoroughly check the Pmod SF3 with the date code of 1624. My module is has the IC marking of 25Q512A, which should correspond to the Micron N25Q512A (I am not certain if you have a different marking on your IC). As you can probably guess, this ended up revealing that the Enhanced Volatile Configuration Register between the two modules do not match. This is what I get when I compare the two Enhanced Volatile Configuration Registers: N25Q512A, 1624 MT25QL256, 2208 bit 7 Quad I/O, default 1 Quad I/O, default 1 bit 6 Dual I/O, default 1 Dual I/O, default 1 bit 5 Reserved, set 0 DTR, default 1 bit 4 RST/Hold, default 1 RST/Hold, default 1 bit 3 Vpp Accel, default 1 Reserved, set 1 bit 2:0 Output driver str, 111 Output driver str, 111 This difference definitely explains why you were expecting the Enhanced Volatile Configuration Register to read back as DFh and you were instead receiving a FFh. What I am uncertain of is why writing the CFh works for the N25Q512A chip at all; since the bits are written as MSB this would be setting the reserved value to a value of instead of the set value of 0. Both chips should then seemingly be set up as running with Dual I/O protocol enabled and the Reset/hold disabled. Both modules have the 10k pullup resistor on RST# and HLD#, though the newer module, 2208, leaves R10 (the 47 Ohm resistor) entirely disconnected so you could not toggle the RST# even if you wanted to. What I am not understanding is why writing CFh to the Enhanced Volatile Configuration Register is yielding different results. Aside from the reserved 0 value on the 1624 chip being set to a 1, both registers are being manipulated in the same way... I will continue to look into this to see if I can find any sort of definitive results, or ideally, resolution. Thanks, JColvin Link to comment Share on other sites More sharing options...
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DeanG
I have older SF3 PMODs with a date code of 16 34 that I have been using without issue. I have ones purchased recently that seem to misbehave. Date code 22 08. Doc with more details and waveforms attached.
PMOD SF3 issue.docx
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