UART example doesn't work when booting from SD card

[A.O]

I am using a Cora Z7-10 board and have a sandbox project (Verilog) that can boot using an external SD card without issue. When I launch Vitis and import any UART example into my project, I can run that via JTAG and see that all of the examples work fine. I then create a boot.bin, that includes the fsbl, the bitstream, and the example.elf files - the FPGA does not boot properly. I can see that the Verilog circuit is working, but the UART example isn't. I am powering the board via USB,  and I have confirmed that the baud rate and COM port is correct when running the examples using JTAG. I've attached the boot image and the bif file. Any help would be much appreciated.

Boot_and_bif.zip

[JColvin]

Hi @A.O,

If you are using Vitis, there is a checkbox during project creation called Generate Boot Components while selecting your .xsa that will include the FSBL for you already in the BOOT.bin (as noted in this guide here: https://digilent.com/reference/programmable-logic/guides/zynq-baremetal-boot), so you do not have to manually create it yourself.

I don't have a Cora Z7-10 to directly test this, but I created a matching design for the Cora Z7-7S (the single core processor version of the Cora Z7) which was able to successfully boot up with the two buttons lighting up the RGB LEDs to a single color (one red, one green) when pressed, and an external UART setup where any character typed in the host PC's serial terminal is sent out Pmod JA2 and any character received on Pmod JA1 is then sent to the host PC's serial terminal.
I connected Pmod JA1 and JA2 with a flexible breadboard jumper wire to turn the UART setup into an external loopback.

I attached the Vivado 2020.1 project that I used as well as the main.c and BOOT.BIN that I used in Vitis (all designed for the Cora Z7-10). Make sure that when you are booting from the SD card that it is in a FAT32 file format and that jumper JP2 is loaded.
I know that when booting from the SD card that if the serial terminal is not already connected to the board (perhaps because of a power cycle), you may miss the first "peripherals have been initialized" message.

Let me know how this works for you.

Thanks,
JColvin

CoraZ710-extUart_GPIO-20.1.zip

[A.O]

Thanks @JColvin,

I was able to boot up via the SD card using your project file and it functions as expected. In my original project, I had only included the Zync processing block with a simple RTL module, but did not include the axi peripheral block. Can you confirm that this block is necessary in order to have the block diagram interface with the processor?

[JColvin]

Hi @A.O,

If you are wanting to control the RTL module (and any downstream pins connected to the FPGA bank as opposed to MIO pins connected to the Zynq processor) directly with the Zynq processor, then you would need some sort of intermediary system such as Xilinx's AXI to let the processor be able to control those FPGA pins. I selected this methodology for my design because that was a "quick and dirty" option to get different elements of a block design up and running (and the MIO pins associated with UART1 on the Cora Z7 don't appear to be routed out to any physical pin, so I didn't have a way to externally test that second UART port not associated with the USB-JTAG bridge).

Alternatively, you can use EMIO pins from the PS itself to handle the PL material through this well made write-up by zygot:

Thanks,
JColvin

[A.O]

Thanks @JColvin,

This is very helpful and I appreciate the help.

[DavideDevoti]

Hi guys,

like I wrote on another topic I'm having trouble booting my application from sd card on a Cora Z7-07S. Apparently I'm doing all as indicated in the manual but then when I put the jumper on JP2 and I power cycle the board nothing happens (also FPGA programming DONE LED is off even if my boot image should contain a fpga bitstream). I'm supplying the board using usb and my application when loaded from jtag works fine. 

Any idea about what could be wrong ?

Any help will be appreciated.

Thanks

Davide