I2C SCL/SDA connections from IO on Arty A7 board to

[Phani Ramkumar]

Hi,

I'm doing FPGA implementation of I2C slave using Arty A7 100T board. I will drive I2C bus from an external I2C driver.

In my verilog code for I2C slave, I have internal ports named sda_in, scl_in, sda_out and scl_out. How should I connect these internal ports to final inout ports sda and scl on FPGA board. I mapped scl to package pin L18 and sda to package pin M18 based on the sample xdc given in tutorial. 

Do I need to create some IO buffer and add it my top DUT wrapper? 

set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 PULLUP TRUE } [get_ports { scl }];
set_property -dict { PACKAGE_PIN M18 IOSTANDARD LVCMOS33 PULLUP TRUE} [get_ports { sda }];

Regards,

Phani

[Prabhat.kumar]

You just need to write something like this :

module xyz(

input scl,

inout sda

);

I am assuming you are aware of the fact that you need to drive the SDA pin to high impedance manually in code when you are not sending any  data.

Edited August 9, 2022 by Prabhat.kumar