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Using an ILA (integrated logic analyzer IP core) with Zybo z7-20?


DiegoGM
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Of course, assuming that you have any logic in the PL to capture.

How do you do that? This is more complicated. It depends on your design flow... the ILA core has a native or AXI version. The logic in the PL can be clocked with a source from the PS clocking infrastructure or external clock connected to a PL pin.

If you are looking for a starting point you might consider this HDL design flow example: https://forum.digilent.com/topic/22512-manipulate-pl-logic-using-ps-registers/

If you try the tutorial out and have questions about it post them to that thread. Edited by zygot
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Thanks so much, @zygot

I'll certainly check this HDL design flow example you shared with me. I noticed that I wasn't clear enough with my question. What I mean is, is it possible to use an ILA with the zybo-7020 board because it does not have a JTAG-HS3 port, only a micro USB port (UART, JTAG). I have a working design in the PL to capture that includes an ILA. I generated a bitstream and attempted to program the FPGA from Hardware Manager using the bitstream file (.bit) and the debug probes file (.ltx); however, the Hardware Manager states that there are no debug cores despite the fact that there is a debug probes file that I select when attempting to program the FPGA. Please see the picture attached for clarification. So I thought that I may need to use JTAG-HS3 programming cable / debugger in order to configure the ILA with the .ltx file. Is this assumption correct?

 

I look forward to hearing from you. 

 

image.thumb.png.9d9c42bc83b2c7178b09133edd97ad20.png

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The project in the tutorial was developed on the Zedboard which uses a Z7020 device. Digilent boards generally have both a USB UART and JTAG implemented in the same FTDI bridge device and using one USB connector. The Vivado Hardware Manager can use this same USB cable to configure the device and run the ILA. That's how I used the ILA to verify that the design works as intended. The USB UART and JTAG are enumerated as separate devices with different endpoints so both can be used independently.

Uually the Hardware Manager automatically finds both a bit file for configuration and an Itx file for the ILA, if it actually got placed into bitstream. If you had to find the Itx file youself there must be something gone awry during the analysis and implementation that caused the ILA to be removed. You can look through the messages for a clue. I run into this situation from time to time and it's always a silly mistake on my part. Edited by zygot
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