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Xilinx VPSS MicroBlaze Example


Mario875

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Hi all,

I am looking for a Microblaze (or at least some kind of Vitis) example project for the Xilinx Video Processing Sub-System.

Really what I am looking for is something like this video with the sample code... https://www.youtube.com/watch?v=tBb1iL6lb24

If you skip to 8:20 in the video you will see that there is a menu which allows you to simply set the output resolution / scaling, that is all I am needing for now.

I have a test pattern generator running as part of the block design and I have implemented the IP cores for VPSS, MicroBlaze, MIG_7 memory controller, etc. Now I just need an example MicroBlaze code to do the above.

Any suggestions?

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Quick follow up...someone on the Xilinx forum pointed me towards the Video Series Blog... https://support.xilinx.com/s/question/0D52E00006hpsS0SAI/xilinx-video-series-and-blog-posts

It looks like "Video Series 29" is closest to what I need. I have downloaded the files but when I try to build the SW project I kept getting errors about missing headers.

I added the "Includes" to the header file sources in the Xilinx Vitis directory, but now when I try and build I keep getting errors like the ones below and I don't know what to do to fix it, any suggestions?

../src/app_hdmi.c:111:15: error: 'XPAR_AXI_VDMA_0_BASEADDR' undeclared (first use in this function); did you mean 'XPAR_AXIVDMA_0_BASEADDR'?
 
../src/app_hdmi.c:260:26: error: 'XPAR_CLK_WIZ_0_BASEADDR' undeclared (first use in this function); did you mean 'XPAR_GPIO_0_BASEADDR'?
 
../src/app_hdmi.c:451:51: error: 'XPAR_V_TPG_0_DEVICE_ID' undeclared (first use in this function); did you mean 'XPAR_XV_CSC_0_DEVICE_ID'?
 
../src/app_hdmi.c:459:46: error: 'XPAR_V_TC_0_DEVICE_ID' undeclared (first use in this function); did you mean 'XPAR_XV_CSC_0_DEVICE_ID'?

I just want to get this build working so I can use it as a template to modify and suit my own needs. Any help greatly appreciated!

Edited by Mario875
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Hi @Mario875,

I haven't tried this particular project, but this sort of error indicates that the names of the IPs on the hardware project (represented by the hardware platform in SDK/Vitis) itself do not match the parameters being used in the various application files.

Looking a little bit at the documentation of the link you provided, it seems like the example files provided are designed for a Zynq based chip rather than a Microblaze based system, so that may be part of the issue in terms of getting the project working as intended.

In principle, I would think it would be possible to modify the example project for a Microblaze system (or work from the beginning of the tutorial series and recreate the setup from scratch), though again I have not personally done this so I'm not certain on the overall feasibility of porting such a project.

Thanks,
JColvin

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So, I decided to side-step a little...my HW is VERY similar to what is on page 69 of the product guide (link below), as such I thought it would maybe be best to use the example code described in there from page 71 onwards. Only difference is I have an AXI traffic gen connected to the TPG to output a fixed pattern at fixed resolution, so I commented out the code for all the TPG stuff in the example and went to build it but not I keep getting the error "unknown type name Xperiph" and I am not sure why when that's part of the example code that relates to things like the VTC which I do have and I also have connected in the same way as them.

The Vitis side of Xilinx stuff is really not my strong suite, embedded C and all that, especially their implementation of it.

https://www.xilinx.com/content/dam/xilinx/support/documents/ip_documentation/v_proc_ss/v2_3/pg231-v-proc-ss.pdf

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