Eclypse Z7 Program to AutoStart on PowerUp

[atown622]

I noticed that for the demo project I have to continually program the FPGA and then run it for the code to start working.  How can I make it such that the program were to automatically start/stop on power up/down?

[artvvb]

Reprogramming the FPGA whenever you launch a project for JTAG debugging or just to run the project from SDK in general is pretty normal in my experience.

If you wanted to, you could disable FPGA programming in your Run Configurations - Go to Run->Run Configurations in the top menu, then find and uncheck the reset entire system and program FPGA boxes, see the screenshot below. However it is then the responsibility of the application project to return all of the hardware devices implemented in FPGA fabric to a known state - potentially requiring PS to perform software resets of any peripherals in the system that require it - this functionality hasn't necessarily been implemented in demos you may be working with. You'd also need to use the Xilinx->Program FPGA menu option to load the bitstream before running software.

Later down the line, you can also create a boot image including your bitstream, application ELF file, and a first stage bootloader to boot the project from SD or SPI Flash. See here: https://digilent.com/reference/programmable-logic/guides/zynq-baremetal-boot

Thanks,

Arthur

[atown622]

Thank you.  I am looking to just be able to power this on and see it start doing what I had last coded it as basically.  Ill look into these options more in depth.

[atown622]

9 minutes ago, artvvb said:

Reprogramming the FPGA whenever you launch a project for JTAG debugging or just to run the project from SDK in general is pretty normal in my experience.

If you wanted to, you could disable FPGA programming in your Run Configurations - Go to Run->Run Configurations in the top menu, then find and uncheck the reset entire system and program FPGA boxes, see the screenshot below. However it is then the responsibility of the application project to return all of the hardware devices implemented in FPGA fabric to a known state - potentially requiring PS to perform software resets of any peripherals in the system that require it - this functionality hasn't necessarily been implemented in demos you may be working with. You'd also need to use the Xilinx->Program FPGA menu option to load the bitstream before running software.

Later down the line, you can also create a boot image including your bitstream, application ELF file, and a first stage bootloader to boot the project from SD or SPI Flash. See here: https://digilent.com/reference/programmable-logic/guides/zynq-baremetal-boot

Thanks,

Arthur

I am no longer using SDK for this.  Can this be done from Vivado?

[artvvb]

You may need to use SDK exclusively for a bootloader, either omitting an application elf file from the boot image or using the simplest one it's possible to create, like a Hello World example.

[atown622]

Just now, artvvb said:

You may need to use SDK exclusively for a bootloader, either omitting an application elf file from the boot image or using the simplest one it's possible to create, like a Hello World example.

Could I import a massive amount of .txt files as sources into vivado and then from there use that generated bitstream to make an SDK project for which is just a hello world or whatever, that could then auto start the vivado project essentially??

[artvvb]

The amount of data that can be stored in the bitstream is limited by available on-chip resources. You could, for example, use all of the block RAM memory on the chip, by either using a Xilinx block memory generator IP or by inferring RAMs in your RTL code, then load data into those memories. Data would come from a .coe file in the case of the IP.  Inferred RAMs would likely be filled up using readmemb or readmemh if using verilog - there are a fair number of canned examples of doing this around on the web.

The Zynq-7020 chip has a total of ~630 KB of block ram available (140x 36 Kb blocks). - EDITED

Edited June 16, 2022 by artvvb

[atown622]

51 minutes ago, artvvb said:

The amount of data that can be stored in the bitstream is limited by available on-chip resources. You could, for example, use all of the block RAM memory on the chip, by either using a Xilinx block memory generator IP or by inferring RAMs in your RTL code, then load data into those memories. Data would come from a .coe file in the case of the IP.  Inferred RAMs would likely be filled up using readmemb or readmemh if using verilog - there are a fair number of canned examples of doing this around on the web.

The Zynq-7020 chip has a total of ~630 KB of block ram available (140x 36 Kb blocks). - EDITED

Is the bitstream storing the .txt files I would have? Or would it just be storing their locations on the SD card for which to access later?

[artvvb]

The scheme I described above assumes the data in the files ends up stored in BRAM and not on an SD card. The txt files would need to be converted into some kind of intermediate file (like a coe as mentioned above), but what exactly you do with them depends on how you implement your design and on the starting format of the data in the files. It also requires the data to fit in the chip's available BRAM.

The SD card slot on the Eclypse is connected to Zynq PS and likely requires mounting a filesystem and reading data from the SD card from SDK software. It's maybe "easiest" to do this within Petalinux, but as stated, requires use of SDK and Petalinux.

Edited June 16, 2022 by artvvb

[atown622]

On 6/16/2022 at 6:58 PM, artvvb said:

The scheme I described above assumes the data in the files ends up stored in BRAM and not on an SD card. The txt files would need to be converted into some kind of intermediate file (like a coe as mentioned above), but what exactly you do with them depends on how you implement your design and on the starting format of the data in the files. It also requires the data to fit in the chip's available BRAM.

The SD card slot on the Eclypse is connected to Zynq PS and likely requires mounting a filesystem and reading data from the SD card from SDK software. It's maybe "easiest" to do this within Petalinux, but as stated, requires use of SDK and Petalinux.

Is there no eeprom option for just downloading the bitstream to the board such that it retains what I programmed to it?  (No longer looking at using .txt file, just have a bitstream.

[artvvb]

Booting from QSPI flash, or any other nonvolatile media, works pretty much the same way that booting from an SD card does, and still requires that a first-stage bootloader running in Zynq PS be used.