longcntn96 Posted May 23, 2022 Share Posted May 23, 2022 Hi, I am trying to work with the DHB1 pmod module by using Pmod IP following the instruction Getting Started with Digilent Pmod IPs. I tried with vivado 2019.1(using library of v2019.1) and 2018.3(using library of v2018.2) and always got the same warning when running synthesis: The XDC file in synthesis design: I ignored this message and continued creating a sdk project and then ran the example program, but no signal is made to the pmod pin. This is my block design: Can someone tell me what did I miss? and how to fix it? or If you can try to run synthesis with another vivado version(e.g. 2018.2) and let me know if you get the same message or not Thank you! Link to comment Share on other sites More sharing options...
0 zygot Posted May 23, 2022 Share Posted May 23, 2022 I'm pretty sure that you have issues with competing location constraints. It's unfortunate that Vivado makes it a chore to find all of it's own and the user's constraints files in one convenient place. I'd look into the 'BOARD_PART_PIN' assignment. I've only run into this on the latest versions of Vivado using the xHub board definition files, for designs that specify aboard instead of a part in the project settings. I looked at the current Digilent vivado-boards-master for your PMOD and don't see see that convention being used. BOARD_PART_PIN does nothing except abstract the hardware, making some users more dependent on the tools and creating confusion. It's one of those things that, for those wanting to do FPGA development without learning how, can make creating a design almost trivial; that is when everything works out as planned. Unfortunately, since Xilinx has a bad habit of making changes to the basics that are not backward compatible things rarely work out as planned, especially across tool versions trying to create a bitstream for old sources. Link to comment Share on other sites More sharing options...
0 longcntn96 Posted May 24, 2022 Author Share Posted May 24, 2022 Hi, Thank you for the reply! 16 hours ago, zygot said: I looked at the current Digilent vivado-boards-master for your PMOD and don't see see that convention being used. I am not sure I fully understand what you wrote there. Do you mean the board file has been updated and does not use BOARD_PART_PIN anymore? How can I clear the problem? Link to comment Share on other sites More sharing options...
0 zygot Posted May 26, 2022 Share Posted May 26, 2022 No, I'm saying that I believe that the use of BOARD_PART_PIN, which is applied to all IO identifiers as a place holder that references a different source file, is associated with only the latest versions of Vivado. I'm wondering how you even have a reference to BOARD_PART_PIN in your constraints file. If you use the constraints from Digilent you won't see it anywhere. I've never seen this with the tool versions that you are suing; and I still do use VIvado 2019.1 frequently. There must be something about the way that your project was constructed; perhaps a tcl script writtne for a later version of VIvado? Link to comment Share on other sites More sharing options...
0 longcntn96 Posted May 28, 2022 Author Share Posted May 28, 2022 On 5/26/2022 at 9:04 PM, zygot said: No, I'm saying that I believe that the use of BOARD_PART_PIN, which is applied to all IO identifiers as a place holder that references a different source file, is associated with only the latest versions of Vivado. I'm wondering how you even have a reference to BOARD_PART_PIN in your constraints file. If you use the constraints from Digilent you won't see it anywhere. I've never seen this with the tool versions that you are suing; and I still do use VIvado 2019.1 frequently. There must be something about the way that your project was constructed; perhaps a tcl script writtne for a later version of VIvado? Actually i didn't get the BOARD_PART_PIN warning when i used the pmodOLEDrgb IP. It would be helpful if someone can confirm that the DHB1 IP works fine Link to comment Share on other sites More sharing options...
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longcntn96
Hi,
I am trying to work with the DHB1 pmod module by using Pmod IP following the instruction Getting Started with Digilent Pmod IPs.
I tried with vivado 2019.1(using library of v2019.1) and 2018.3(using library of v2018.2) and always got the same warning when running synthesis:
The XDC file in synthesis design:
I ignored this message and continued creating a sdk project and then ran the example program, but no signal is made to the pmod pin.
This is my block design:
Can someone tell me what did I miss? and how to fix it?
or If you can try to run synthesis with another vivado version(e.g. 2018.2) and let me know if you get the same message or not
Thank you!
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