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ZYBO-receive digital data


Naveen_

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A lot depends on the signal you are trying to receive. Are you trying to capture some parallel data without any control signals, or using some protocol like SPI? How fast do you need to be sampling the signal?

In general, PL to PS data transfers will be going through some AXI IP, whether that's an AXI DMA and some custom frontend, a custom AXI Lite core, or, if speed/throughput isn't a concern, some slow interface like an EMIO or AXI GPIO core. Of these, AXI DMA is the only one that doesn't require constant attention by the processor - transferring data into the DDR reading a single register into a variable or array stored in DDR - but is also probably a more complex option to start trying this with.

Thanks,

Arthur

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Usually "high-speed" interfaces use source synchronous interfaces requiring a reference clock. This requires a clock capable pin to be available. Also, it depends on logic signal compatibility. What is the ADC that you want to evaluate? The interface details are important for providing an answer.
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The standard PMODs have 200 ohm series resistors as a level of protection for the FPGA. This limits the usable bandwidth for any signals on their pins considerably. The so called "high-speed" PMODs don't have these and thus higher capability as individual pins.

If you are comfortable using an HDL what you want to do is pretty easy. Create a source and assign it to one of the 'high-speed" PMODs and create a sink and assign it to the other 'high-speed" PMOD ( assuming that you have one of the boards with 2 of these ). Be sure to simulate your design first. For source-synchronous interfaces you will need a clock capable pin on the sink PMOD. Such a design where both the source and sink use a related clock isn't very useful if you want to use your experiment as a starting point for connecting an interface from an external board. Digilent boards come with a very limited supply of external clocking sources bt generally you can find 2 somewhere in the schematic. If you want to study an example of a board to board interface that's already been done you can look here: https://forum.digilent.com/topic/20479-inter-board-data-transfer-project/

The Digilent forum sections are pretty cluttered with extraneous postings so it's not easy finding ready made projects with source code; still it's worth looking around.

Digilent makes FPGA boards supporting their PMOD ecosystem, not FPGA boards for the kind of projects that you want to do. There are better options available ( well, perhaps not at the moment as the world supply chain is completely broken ). Personally, I like the Terasic DE0 Nano as a general purpose FPGA platform that can be incorporated as a dedicated component in a custom design or as a board for this kind of project. It's Cyclone IV based so you have to use Quartus. Recent version of Quartus are completely broken if you want to use Intel high data rate IP like DDR/LPDDR2, but the Nano doesn't have any resources requiring Intel IP so it's well suited for any pile of doodoo that Intel releases as a tool version. Altera ModelSim is superior to Xilinx ISIM as a real world logic simulator( though it's so old that it doesn't have the right to be ).

Trying to teach the old-dog FPGA board that you have in hand to do something that it's wasn't design to do is usually just an exercise in frustration.

For about 2x the cost of the DE0 Nano the Cyclone V GX Starter Kit is a nice alternative and you might actually be able to find one to buy somewhere ( I just did ). It has a 40-pin GPIO header and an HSMC header making it particularly useful for a variety of projects. The LPDDR2 is almost useless as the tools don't support burst operation. Be aware that most electronics like this are unavailable or cost 2X-4X what they should... it's supply and demand without cost controls. Edited by zygot
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