how to receive data from ethernet port in SDK(zynq) and put the data in block ram

[arzazo]

how to receive data from ethernet port in SDK(zynq) and put the data in block ram, i use the ZEDBOARD? 

my data is frames have 1280 bytes in lenght

[zygot]

The ZYNQ GEM controllers are a bit arcane to use. As far as I know you have to set up DMA Buffer Descriptors to connect the Ethernet MAC to memory; there aren't GEM data registers to access directly. It may be possible to use AXI BRAM in the PL as a BD source or sink; I don't know because I've never tried. So, if you goal is to connect your PL logic to a PS GEM then you likely have a few design options to choose from. You'll have to figure out how to synchronize your PS code to with your PL design to make sure that Tx data is available and Rx data is consumed properly. Since your frames are short you shouldn't have to worry about AXI burst addressing issues as long as high data rates are not important.

Read the ZYNQ 7000 TRM for details on how to use the GEM. The SDK has numerous example projects to compile and inspect. Expect to put some effort into it.

The more that you can constrain your Ethernet connection operation the easier the HW/SW project can be. Depending on your project requirements, and how you choose to address them, things could get pretty messy.

In general, FPGA vendors have a strong preference as to Ethernet use cases. Swimming against the flow will be hard work; but potentially worth the effort. Edited March 28, 2022 by zygot