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Multiple LVCMOS levels on ZYBO PMOD ports



I'm having problems with IOSTANDARD specifications on the PMOD ports of the ZYBO.

My design utilizes most of the PMOD ports, namely JB-JE, and on one of the ports I want to output a 2.5V LVCMOS signal (named "Sync"). The other signals are all 3.3V LVCMOS. Trying to implement this on the ZYBO yeilds the following message:

[Place 30-58] IO placement is infeasible. Number of unplaced terminals (1) is greater than number of available sites (0).
The following Groups of I/O terminals have not sufficient capacity:
 IO Group: 1 with : SioStd: LVCMOS25   VCCO = 2.5 Termination: 0  TermDir:  Out  RangeId: 1 Drv: 16  has only 0 sites available on device, but needs 1 sites.
    Term: Sync


Attached is an example of my .XDC file. It's a bit messy since it was created manually first, then edited with the I/O Ports window. I'm wondering if it's possible to do what I'm asking. From my research, it sounds like there aren't enough I/O Banks to support so many outputs, with one output requiring a different VCCO. Is this accurate?


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Hello krusing, welcome to the forum!

Your problem is not that unusual, and I've struggled with it myself.  Thebottom line answer is that you cannot set the output to the 2.5V you want.

Here's what's going on: Each FPGA has a series of I/O banks.  Each I/O bank is driven by a voltage/power source.  That voltage source is used to drive the entire I/O bank.  So, to output 2.5V on a bank, you must first drive the bank at 2.5V.  Then you need to specify, via the XDC or UCF or whatever file, that the output wires on that bank run at 2.5V. 

This is actually a *really* useful functionality--to the board designer, in that the FPGA can be used as a voltage level converter.  Simply specify one bank at one voltage, and another bank at another, and allow the FPGA to do any logic transformation (or none) in between, and voila!  You have a voltage converter without further hardware.  For example, one bank might control a memory running at 1.2V, and another might control the PMods at 3.3V.  Of course, the board designer needs to worry about having enough wires in each bank for each purpose but ...

In this case, Digilent has already designed the boards.  Since the PMod specification requires 3.3V, all of the wires routed to the PMod will come from a 3.3V bank.  So ... you are out of luck.  You will need to rely on another mechanism to get down from 3.3V down to 2.5V.



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