Vivado/Vitis 2021.1 I can see nothing on serial terminal

[snow]

Hi i a make a design on vivado 2021.1 with a dma and a custom stream interface.I export the hardware on vitis and create new platform and application project.But when i run the program nothing show on putty serial terminal which is connected with usb to fpga.I have the down here the images of the design and c code on vitis.Also when i create platform project with the xsa of vivado after build platform project some warnings it is shown :

Description    Resource    Path    Location    Type
label 'END' defined but not used [-Wunused-label]    inverter        line 269    C/C++ Problem
label 'END' defined but not used [-Wunused-label]    xipipsu.c  /inverter/psu_cortexa53_0/standalone_domain/bsp/psu_cortexa53_0/libsrc/ipipsu_v2_9/src    line 269    C/C++ Problem
unused parameter 'clk' [-Wunused-parameter]    inverter        line 1693    C/C++ Problem
unused parameter 'clk' [-Wunused-parameter]    inverter        line 1710    C/C++ Problem
unused parameter 'rate' [-Wunused-parameter]    inverter        line 1693    C/C++ Problem
unused parameter 'rate' [-Wunused-parameter]    inverter        line 1710    C/C++ Problem

Anyone can help with that ?