Maximum number of GPIOs to MicroBlaze? Two?

[rehsd]

On my Arty A7-100T, I have a current block design with two AXI GPIOs, each dual channel, so that I can access 128 bits of parallel data between my VHDL/block design and MicroBlaze code. Is there a limit of two GPIOs, or could I add a third?

From MicroBlaze code, it seems like I can only use two GPIOs (XPAR_AXI_GPIO_0_DEVICE_ID and XPAR_AXI_GPIO_1_DEVICE_ID). Can this be extended to three?

Thanks!

[rehsd]

Disregard my question. While I couldn't find documentation listing any limitations, I decided to test it out by adding a third AXI GPIO to a project. After building in Vitis, the third GPIO showed up. I assume that any limitation is simply that of available resources on the FPGA.

[thinkthinkthink]

You're also limited by the processor to peripheral interconnect but then again you can just add another interconnect IP in your block design.