HS3 Vref

[EENew24]

Hello,

I want to use the HS3 but we unfortunately dont bring out the VREF voltage to your programmer. How is VREF handled on the HS3 programmer? Is sampled on startup and latched into place? If we tied it to your SRST, which is pulled up to 3.3V, on our board would that work or if SRST is set low will that cause issues for VREF? 

Thanks,

Brandon

[JColvin]

Hi @EENew24,

The Vref pin supplies the JTAG signal buffers and so it must to be tied to the same voltage supply that drives the JTAG port on the FPGA. Vref itself can be any voltage between 1.8 V and 5 V. More details about this can be found in the JTAG HS3 Reference Manual: https://reference.digilentinc.com/reference/programmers/jtag-hs3/reference-manual.

Let me know if you have any questions about this.

Thanks,
JColvin

[EENew24]

@JColvin Thanks for the quick response! 

So it sounds like Vref has to be on all of the time and if it ever drops to 0V the JTAG buffers will turn off.

Thanks,

Brandon

[JColvin]

Correct, the Vref should not ever be connected to any I/O pin where the voltage could change.

[VictorMa]

On 4/28/2021 at 2:11 AM, JColvin said:

Correct, the Vref should not ever be connected to any I/O pin where the voltage could change.

May I know Vref working range? From reference manual it is 1.8~5V. My question is, if it is working at 1.8V, what is minimum voltage requirement? 1.7V? 

We used JTAG-HS3 to programm coolrunner XC2C256-7FT256C with Vref=3.3V before. Now we plan to change Vref to 1.8V. Now sure how reliable this JTAG-HS3 will be working with XC2C256-7FT256C (VCCAUX can be as low as 1.7V). THank you for your support. Victor 

[JColvin]

Hi @VictorMa,

My understanding is that the mimimum voltage for the Vref supply is 1.65 V as per this section of the Reference Manual here: https://digilent.com/reference/programmers/jtag-hs3/reference-manual#dc_operating_characteristics.

Thanks,
JColvin