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PMOD IPs not compatible with Vivado/Vitis 2020.2?


Dachs

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Hello together, 

I tried to integrate different PMODs from the current IP library (ACS, Monochromatic OLED).  I added them as a block in Vivado and when I integrate the HW into Vitis and try to compile it with an empty hello world c file, it throws me the following error message:

16:52:10 ERROR	: Failed to openhw "D:/XilinxProjects/VitisWorkspace/designo_wrapper/export/designo_wrapper/hw/designo_wrapper.xsa"
Reason: ERROR: [Common 17-39] 'hsi::open_hw_design' failed due to earlier errors.

16:52:10 ERROR	: Failed to update application flags from BSP for 'OLED_app'. Reason: null
java.lang.NullPointerException
	at com.xilinx.sdx.sw.internal.SDxSwPlatform.<init>(SDxSwPlatform.java:305)
	at com.xilinx.sdx.sw.internal.SDxSwPlatform.create(SDxSwPlatform.java:214)
	at com.xilinx.sdx.sdk.core.util.SdkPlatformHelper.getSwPlatform(SdkPlatformHelper.java:61)
	at com.xilinx.sdx.sdk.core.build.SdkMakefileGenerationListener.getSwPlatform(SdkMakefileGenerationListener.java:160)
	at com.xilinx.sdx.sdk.core.build.SdkMakefileGenerationListener.syncAppFlags(SdkMakefileGenerationListener.java:78)
	at com.xilinx.sdx.sdk.core.build.SdkMakefileGenerationListener.preMakefileGeneration(SdkMakefileGenerationListener.java:48)
	at com.xilinx.sdk.managedbuilder.XilinxGnuMakefileGenerator.notifyPreMakefileGenerationListeners(XilinxGnuMakefileGenerator.java:91)
	at com.xilinx.sdk.managedbuilder.XilinxGnuMakefileGenerator.regenerateMakefiles(XilinxGnuMakefileGenerator.java:75)
	at org.eclipse.cdt.managedbuilder.internal.core.CommonBuilder.performMakefileGeneration(CommonBuilder.java:1006)
16:52:12 ERROR	: Failed to compute checksum of hardware specification file used by project 'OLED_app'
16:52:12 ERROR	: Failed to openhw "D:/XilinxProjects/VitisWorkspace/designo_wrapper/export/designo_wrapper/hw/designo_wrapper.xsa"
Reason: ERROR: [Common 17-39] 'hsi::open_hw_design' failed due to earlier errors.

16:52:12 ERROR	: Failed to openhw "D:/XilinxProjects/VitisWorkspace/designo_wrapper/export/designo_wrapper/hw/designo_wrapper.xsa"
Reason: ERROR: [Common 17-39] 'hsi::open_hw_design' failed due to earlier errors.

16:52:12 ERROR	: Failed to openhw "D:/XilinxProjects/VitisWorkspace/designo_wrapper/export/designo_wrapper/hw/designo_wrapper.xsa"
Reason: ERROR: [Common 17-39] 'hsi::open_hw_design' failed due to earlier errors.

 

When I remove these Digilent PMOD IPs, it works. I'm using 2020.2. Are these IPs not compatible with the newer Xilinx versions? 

Thanks and best regards!

 

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Hi @Dachs,

A number of the Digilent Pmod IPs are not working correctly with the latest version of the Xilinx software. I was seemingly able to build a Vitis project in 2020.2 with just the Pmod OLED, though I don't have that Pmod on hand to directly test it though. I'm not sure what Pmod you are referring to with "ACS" though.

Thanks
JColvin

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HI JColvin, 

thanks for the answer. I got rid of that issue and it almost compiles successfully! Honestly don't know what the issue was, I just started from scratch (again) :).

 

 

 

Thanks all!

 

 

Edited by Dachs
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I've got a follow on question.  I was trying to use the link to the IP zip files using the link in this post -> https://digilent.com/reference/programmable-logic/guides/getting-started-with-pmod-ips.

That link does not work.  The vivado-library on github only seems to go up to 2019.1.

Can you provide the link to the library for 2020.2.  I'm trying to use the pmodOLEDrgb library with an Arty S7.

Thanks,

Ralph

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Hi @ralphjy,

The Pmod IPs, as you noted, are only supported through 2019.1.

Some IPs can be made to work in later versions of Vivado, though they usually require their .xdc pin outputs to be manually constrained (potentially with more debugging with regarding Microblaze and other associated libraries in both Vivado and Vitis).

There has also been some work done in getting Pmods into a hierarchical block (https://digilent.com/reference/programmable-logic/guides/hierarchical-blocks), though the Pmod OLEDrgb has not received this treatment as of yet.

Thanks,
JColvin

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