I've been dealing with the demo projects that digilent provided for Zmods since last week. My aim is to develop a FMCW radar application using both ADC and DAC.
From the screenshots on below, I figured out the basic working principle that; for DAC; A buffer in DMA for the DAC is filled from the DDS output, then it is read from the DAC module and sent over the controller. For ADC: when I call the function start.adcZmod on software, it starts to fill the analog data to a buffer on it's DMA.
But the part I don't understand is how it works when it comes to real time data processing. FMCW needs precise timing, so I need to start ADC immediately as the chirp is produced from DAC. The maximum length of the buffers in DMA are 0x3FFF(16383 in decimal) as I understood. So, if I produce a sweep, will the maximum time interval of it can be 163,80us maximum since the clock frequency is 100MHz. Secondly, what can I do if the incoming wave is not fitted in one buffer?
I'm a fresh graduate and trying to develop my skills on FPGAs and signal processing. Thanks in advance.
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ebaser
Hello,
I've been dealing with the demo projects that digilent provided for Zmods since last week. My aim is to develop a FMCW radar application using both ADC and DAC.
From the screenshots on below, I figured out the basic working principle that; for DAC; A buffer in DMA for the DAC is filled from the DDS output, then it is read from the DAC module and sent over the controller. For ADC: when I call the function start.adcZmod on software, it starts to fill the analog data to a buffer on it's DMA.
But the part I don't understand is how it works when it comes to real time data processing. FMCW needs precise timing, so I need to start ADC immediately as the chirp is produced from DAC. The maximum length of the buffers in DMA are 0x3FFF(16383 in decimal) as I understood. So, if I produce a sweep, will the maximum time interval of it can be 163,80us maximum since the clock frequency is 100MHz. Secondly, what can I do if the incoming wave is not fitted in one buffer?
I'm a fresh graduate and trying to develop my skills on FPGAs and signal processing. Thanks in advance.
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