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Video Timing


AzU

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22 minutes ago, zygot said:

The Zybo reference manual has a nice discussion that should answer all of you questions about VGA timing. Timing, in this case is implemented in the logic design that you configured your board with.

 

Thanks for helping @zygot, I found this, is this related to the video timing?

I uploaded an image.

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Possibly, but not likely.

Perhaps you could provide more detail about what "trouble getting output from VGA to my Monitor" means, and why you think that it's timing related. There's timing for displaying pixels on a VGA monitor and there's timing related to your design implementation.

Where did you get your FPGA configuration .bit file from?

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