What a long day. I finally got the PmodESP32 working on my Arty-A7 with a microblaze cpu. Now that I got it working, I'm trying to figure out the right way to fix the problem. And really it extends to anything using the pmod bridge with the AXI-UARTLITE module.
The AXI clock frequency must be supplied when customizing the AXI-UartLite module, but that module is used inside of the PmodESP32 module and the default customization is 100 Mhz,, while my AXI clock frequency is 83.33 Mhz. Really, any module that exposes the UART internally, should also parameterize necessary settings.
My solution was to edit the PmodESP32 module in IP Packager, re-customize the modules (and for some reason, it seems to be stuck on a Cora-Z7 part), change the customizer part to the Arty-A7, repackage the IP. Then do an in-place upgrade on the block design.
I think a complete review of all PMOD modules IP needs to be performed..... Can we submit a bug in GIT and will it be acted on?
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blackt1ger
What a long day. I finally got the PmodESP32 working on my Arty-A7 with a microblaze cpu. Now that I got it working, I'm trying to figure out the right way to fix the problem. And really it extends to anything using the pmod bridge with the AXI-UARTLITE module.
The AXI clock frequency must be supplied when customizing the AXI-UartLite module, but that module is used inside of the PmodESP32 module and the default customization is 100 Mhz,, while my AXI clock frequency is 83.33 Mhz. Really, any module that exposes the UART internally, should also parameterize necessary settings.
My solution was to edit the PmodESP32 module in IP Packager, re-customize the modules (and for some reason, it seems to be stuck on a Cora-Z7 part), change the customizer part to the Arty-A7, repackage the IP. Then do an in-place upgrade on the block design.
I think a complete review of all PMOD modules IP needs to be performed..... Can we submit a bug in GIT and will it be acted on?
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