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Found 4 results

  1. I am adding data file to SPI flash memory. When I add a simple ASCII file, that's what I get as user data. I would like to convert my ASCII data file to binary or some form that gives me raw data. Is there a file converter utility I can use to convert the ASCII file to a binary file prior to adding it to the configuration .bin file? example.txt
  2. Hello I am attempting to follow this but I am confused about section 2.3. It says to place all the application code in DDR. The Basys3 has no external memory but for the SPI flash. From a SPI flash description from an Arty reference, it says but when I read the Xilinx answer record 63605, it says on step 5. Create helloworld application and link to DDR (in the linker script make sure that this application is executing from DDR) Can someone explain to me how to do this all in the SPI flash? Do I need to somehow set that up in my block design in? I do have the QSPI in my block design already but it is not available to me as an option in the linker script window.
  3. Hi, I followed the example for the spi srec loader. My vhdl/hardware design has many peripherals. The https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start example implies the same hardware design. Could a smaller hardware design (footprint) be implemented for the bootloader? Or is the same hardware design is used for all microblaze apps? Rob
  4. Is it possible to write a VERILOG / VHDL code to download the programming file (fpga bitstream) to the hardware device (for example an SPI flash memory)? I'm asking this, because I would like to transfer a bit stream into a spi flash memory, which will then be mounted on an fpga card for boot and configuration. I have already written a few lines of code to write, read, and erase the contents of the 32 MB NOR flash memory (PMODSF3). I tested my code and it works without problems! However, how to read the bitstream, before writing it to the flash memory? Do I only need to transfer the bitstream into flash memory or do I have to add a header and a footer in the memory before and after the transfer of the bitstream file? Have you ever worked on a similar project? N.B: I am using a Xilinx FPGA (Artix-7) on a customized board. I would like to find an alternative solution to the Xilinx hardware manager to program the SPI flash. Any ideas, feedbacks and suggestions are welcomed! Thank you Hervé