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Showing results for tags 'microblaze block design'.
Hello folks, I am working on zynq 7000 board in which artix 7 fpga is there.In the old design spartan 3 was used. I am working on migration from ISE 8.1 to vivado 19.1. I have migrated vhdl code easily but facing problem in migration of processor side. I have created a new block design in vivado by using IP integrater with the reference of MHS file in ISE. In ISE 8.1 block design program run from SPI FLASH which is connected to microblaze and which copy the contents from FLASH to SRAM (external memory connected to microblaze in block design). In zynq 7000 as FLASH is towards ps side and OCM is there in zynq so I din't used external memory as well as SPI flash in block design. My microblaze application is running but it is taking more time compared to spartan. Delay problem was also there as in ISE they used function for delay.I have solved it out the delay problem also by hit and trial method to set the count value.Now the function Delay_mSec(100) produce same 100ms in zynq as was in spartan. But still fucntion execution taking time in ZYNQ, I have put led on and off between functions then I found there are two functions which is taking 16 ms in SPARTAN and 296 ms in ZYNQ.I went through those functions and found in that functions multiple functions are called which is related to FPGA -microblaze communication using GPIO port means FPGA sends the 32 signal to microblaze using GPIO port and microblaze output the signals through GPIO port to FPGA where each bit is mapped from some signals in FPGA code. Now i am not getting that why this this much delay is there? If anybody could help me out then it will be relaxing for me as i am struggling from 1 month. Thanks Here I am attaching the block design system.pdf