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Showing results for tags 'ip integrator'.
Found 3 results
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In all example project I could found, rgb_led is driven from a GPIO block. That works well but I need to drive it from a row of XOR gates and so far I could not convince Vivado to connect the output of the XOR to rgb_led. If you look at the attached picture, the goal is to connect "Res" or "BUFG_O" to rgb_led (which seems to have a 12 bit input since the GPIO which was driving it in the sample project is 12 bit wide). Does anyone know how to do ?
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Hello, I've been working on a project that I need to use the ip integrator and add an RTL block that I made. I'm using a Basys 3 board, Vivado 2018.3 and MicroBlaze ip. I was trying to add the RTL to the source and to the diagram and I used the getting started with ip integrator tutorial. The tutorial itself worked fine and when I added the RTL It passed the validation, synthesis, implementation and even generating the bitstream but then I couldn't export hardware for programing the MicroBlaze and it gave an error saying "Cannot write hardware definition file as there are no generated IPI blocks". Correct me if I'm wrong, but I understood that I need to create an ip that contains my RTL project and only then I can add it to the diagram. If so, does anybody have a tutorial of how to make a new ip? and if that is not the case, what do you think is the problem? thank you, Netanel.
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Hello, Im working on the following IP Integrator design. I have an Arty7 35T FPGA I want to create a block diagram with two modules. The objetive for this implementation is to create a Analog-Digital-Analog vivado project (This one will be a part for a big project). The modules are: - XADC: Input 0-3.33v converted to 16bits. This one as a clock input ( CLK100MHZ ) - Pmod DA3: Digital to Analog converter with SPI Protocol. Inputs 16bits is converted by SPI protocol in a Analog value (max 2.51v). This one as a clock input ( i_clk ) My first idea was to connect Pmod DA3 clock to XADC clock creating a unique clock for the entire design. This design was validated. Creating a HDL Wrapper, it has a correct synthesis, implemetation and bitstream. Programing the board i dont get any analog value for output Pmod DA3, it only works output LED[15:0]. Modules works correctly independently. Should i make a different connection for clocks? I dont know if there is a clock problem or other type problem. i attach the project Can anyone help me? Thanks! XADC + DA3.rar
