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Found 6 results

  1. Hello everyone! I am a FPGA rookie programmer and I have recently bought an Arty Z7-20 board for a university project. I intended to write a simple RTL HDMI transmitter with TMDS encoder. However, I found difficulties in implementing the design on the target FPGA, although all simulations I run on Vivado stated the correct top-module behavior. I also tried to implement the Diglilent official HDMI out demo for Z7-20 package but it did not work neither. Any suggestions ? I am sharing all my project's files attached to this post. Thanks in advance to everyone which will provide any help. P.S. : the project's top-level module is "Video_Generator.v"; Debouncer.v TickCounter.v TMDS_encoder_HDMI.v Video_Generator.v Video_Generator.xdc ClockGenPar.v
  2. I'm following along with the instruction provided on the GitHub (https://github.com/Digilent/Zybo-Z7-10-HDMI/blob/master/README.md) to test the functionality of the Zybo board's HDMI ports. I followed the instruction to the T but cannot seem to get a signal to pass through. At first, I connected my cable box to the HDMI Rx and then I switched to my laptop. In both instances, not only did my TV monitor not detect a signal, but the output on the sdk terminal was that the HDMI-in was unplugged (see first attached photo). The HDP / LD9 LED near the HDMI port turns on, telling me it is detecting a signal. Using the Zybo-Z7 reference manual, I deduced that it might be due to an issue with resolution, but if I try to change the resolution, I get 'stuck' in that menu (see second attached photo) and have to restart the processes by clicking run-as -> Launch on Hardware. I also notice the clock frequency is set to 0, but I'm not exactly sure what could be the issue. I have also attached the block design and xdc file as I'm assuming the issue could be there since the pixel clock isn't running. design_1.pdf Zybo-Z7-Master.xdc
  3. Hello Digilent team, I was able to integrate the bare metal HDMI out on Arty-Z7-20 thanks to your demo from here: https://github.com/Digilent/Arty-Z7-20-hdmi-out/tree/v2020.1 I wonder if you have any plan to make a petalinux version for it with HDMI output integrated on Xilinx toolchain v2020.1? If not yet, do you know where can I start? I don't see documents from Xilinx developing from scratch like this. I found a similar post here but for v2017.v: Looking forward for your advices. Thanks and best regards,
  4. this project to be specific. Are there any pitfalls I should avoid? https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-z7-hdmi-demo/start
  5. hi all, i want want to measure a voltage with the zybo and display the measured values on a screen via hdmi output. i used the hdmi passthrough projent as a start and got that working fine. know when i added the adc in vivado i get the error that the Vccs on bank 35 are incompatibele because the hdmi used 3.3V and the adc uses 1.8V. but when i look in the schematic under synthesis and look and the i/o ports i see that the hdmi aslo uses 1.8V. so why is it a problem when the adc needs 1.8V but when the hdmi needs 1.8V it works just fine.
  6. Hi, i want to take video stream from Usb camera and show via HDMI. How can i make block design. Can you help me ? King Regards