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Found 2 results

  1. rmccormack1
    So I am trying to program the FIFO and the UART on the Digilent USB104A7. I have the block design for the FIFO and UART. My next step is exporting it to Vitis and create the C/C++ code for it. The code should write/put data into the FIFO/UART and then display it into Tera Term. My question is that I have no idea where to start on the code. I am hoping that someone has this code already or can help me get started.
  2. sungsik
    Hi. I'm using zynq board. I'm a beginner. In my design, I used aurora8b10b IP (with framing mode) . It has AXI_ tdata, tkeep ,tlast,tvalid port. I controlled these signal in my custom logic. What I want to do is reading a frame data from aurora on the PS side. When I see the axi stream fifo, I have similar ports. Can I use this? Or should we use DMA? Please tell me the proper way. thanks