Search the Community

Showing results for tags 'differential'.

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Test and Measurement
    • Measurement Computing (MCC)
    • Add-on Boards
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • LabVIEW
    • FRC
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions
    • Archived

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests

Found 6 results

  1. Hello, I have a Nexys Video and a Digilent Sevent Segment Display PMOD. I want to drive the Sevent Segment Display using the Nexys Video. The only two matching PMOD headers are JB and JC but they are are marked on the manual (https://reference.digilentinc.com/reference/programmable-logic/nexys-video/reference-manual) as "differential". However, on the Digilent provided XDC constraints file, the pins are individually controllable and marked as LVCMOS33. Can I use those pins as normal single ended PMOD to drive the seven segment display? Thanks!
  2. So, I want to bring in a 100 MHz clock and route it to a CMT to generate a bunch of lower frequency clocks all phase-locked to the 100 MHz. I appreciate I can't output an LVDS signal, but it looks like I should be able to bring in an LVDS signal as long as I supply my own 100 ohm termination to pins 18 and 19 for example. Am I missing anything? Paul Smith Indiana University Physics
  3. Hi there! I'm trying to make differential clock(100MHz from oscillator) to differential clock output(40MHz differential) clk_100M_P&M is connected to external crystal oscillator(input) and I allocated clk_40_P&M to PIO port(output). clk_front , clk_back is for check point. when I checked, the result was : clk_front : 100MHz & clk_back : 40MHz . However, clk_40_P &N port didn't output some waveform. I have no idea what's the problem. 1st trial : clk_front & back : LVCmos33 and clk_40_P & N : LVDS25 -> result : LVCmos33,(bank34) clk_front & back (success) and (bank35) clk_40_P & N : LVDS25 ( failed ) 2nd trial : clk_front & back : LVCmos25 and clk_40_P & N : LVDS25 -> result : LVCmos25 ,(bank35) clk_front & back (success) and (bank35) clk_40_P & N : LVDS25 ( failed ) thank you for your help!
  4. I'm working with a Xilinx Spartan-7 (Arty S7-25) FPGA and was wondering if the "P" and "N" for the PMOD differential pairs are reprogrammable or swappable? Will swapping them damage any components or just not work? I notice their naming scheme but is there any significance beyond that. The banks I'm referring to are the JA and JB PMOD connections (See JB bank below). Thank you!
  5. Hi, I would like to know what IO standard would I use if I want to input a differential signal to two adjacent PMOD headers on PMOD JB. This differential signal will be an input to a buffer on the FPGA. The current xdc file on github uses LVCMOS33 as a default standard as shown below. set_property -dict { PACKAGE_PIN E15 IOSTANDARD LVCMOS33 } [get_ports { Input_data }]; #IO_L11P_T1_SRCC_15 Sch=jb_p[1] set_property -dict { PACKAGE_PIN E16 IOSTANDARD LVCMOS33 } [get_ports { Input_data }]; #IO_L11N_T1_SRCC_15 Sch=jb_n[1] Would it be fine if I use LVCMOS33 or should I use another IO standard and if so which one should I use. I am using the Arty A7 100t board. Thank you
  6. How do I implement an external differential clock in VHDL for the CMOD S7? Vivado keeps on telling me to inset this flag in my constraint file: set_property CLOCK_DEDICATED_ROUTE FALSE However, I care about timing because it's an external clock signal. I'm using a clock dedicated route(Pmod pin are 2×6) as seen in this schematic.