2. I am attempting to just boot the most basic example (shown below) from JTAG. My process is to generate a Vivado project with ONLY the PS ARM system as shown below.
I then export this and bring it in to a petalinux project using "petalinux-config --get-hw-description=./". I then leave the petalinux config menu and run petalinux-build.
At this point I connect via jtag using XSCT and use the following example in (from Xilinx documentation linked below).
I can successfully get zynq_fsbl.elf and u-boot.elf loaded into the zynq part via xsct. I load and run zynq_fsbl.elf first then stop the arm (arm0) load u-boot.elf and type "con" to run the cpu. I expect to see the u-boot menu on my console (zedboard USB console port), but don't. I don't see anything ever on my console.
I do no modifications to petalinux though, so no changes to any of the default configs. This is ultimately the problem. I do however see u-boot boot with quite a bit of stuff being printed to the console when I execute
"petalinux-boot --jtag --u-boot"
So I know my console works, but I can't manually step through the JTAG boot process. To make this more concise I tried to list my questions below.
Questions
1. Do I need to add anything to my Vivado block diagram shown here? Or can I just build with the single PS block to run the ARMs?
2. Does petalinux need any configuration modifications for the zedboard? For example, does u-boot environment variables need to be modified to get the console UART output to work?
3. Is my my process of: Build PS block in vivado, export the XSC file to petalinux, build the petalinux project with this XSA with NO modifications, load zynq_fsbl.elf and u-boot.elf to boot a minimal u-boot? I don't load the FPGA image or any of the linux OS stuff yet because I don't have u-boot working yet - could this be an issue?
4. I found an article about modifying the u-boot bootcmd - is this necessary for my basic board bring up effort right now?
Petalinux Getting Started Help
in Embedded Linux
Posted
Hello,
I bought a Zedboard recently and have a couple questions.
1. Are there any current petalinux example projects at this resource link? So a vivado/petalinux project I could use as an example?
https://digilent.com/reference/programmable-logic/zedboard/start
2. I am attempting to just boot the most basic example (shown below) from JTAG. My process is to generate a Vivado project with ONLY the PS ARM system as shown below.
I then export this and bring it in to a petalinux project using "petalinux-config --get-hw-description=./". I then leave the petalinux config menu and run petalinux-build.
At this point I connect via jtag using XSCT and use the following example in (from Xilinx documentation linked below).
https://xilinx.github.io/Embedded-Design-Tutorials/docs/2021.2/build/html/docs/Introduction/Zynq7000-EDT/7-linux-booting-debug.html
I follow steps 1,2,3,4 with my zynq board.
I can successfully get zynq_fsbl.elf and u-boot.elf loaded into the zynq part via xsct. I load and run zynq_fsbl.elf first then stop the arm (arm0) load u-boot.elf and type "con" to run the cpu. I expect to see the u-boot menu on my console (zedboard USB console port), but don't. I don't see anything ever on my console.
I do no modifications to petalinux though, so no changes to any of the default configs. This is ultimately the problem. I do however see u-boot boot with quite a bit of stuff being printed to the console when I execute
"petalinux-boot --jtag --u-boot"
So I know my console works, but I can't manually step through the JTAG boot process. To make this more concise I tried to list my questions below.
Questions
1. Do I need to add anything to my Vivado block diagram shown here? Or can I just build with the single PS block to run the ARMs?
2. Does petalinux need any configuration modifications for the zedboard? For example, does u-boot environment variables need to be modified to get the console UART output to work?
3. Is my my process of: Build PS block in vivado, export the XSC file to petalinux, build the petalinux project with this XSA with NO modifications, load zynq_fsbl.elf and u-boot.elf to boot a minimal u-boot? I don't load the FPGA image or any of the linux OS stuff yet because I don't have u-boot working yet - could this be an issue?
4. I found an article about modifying the u-boot bootcmd - is this necessary for my basic board bring up effort right now?
https://www.fpgadeveloper.com/how-to-modify-u-boot-environment-variables-in-petalinux/
Long story short, I'm just trying to step through jtag booting with this most basic project as a starting point and am missing something.
Thanks for any help!