a.gamez
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Posts posted by a.gamez
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On 6/24/2021 at 2:41 PM, elodg said:
I am sorry to hear about your troubles. Unfortunately, we only tested (m)SATA with 2019.1 and it looks to me that Xilinx changed the GTR calibration procedure in the FSBL since then. I suggest using 2019.1 with the Genesys-ZU-OOB-os/hw repos, which is the supported version.
In the mean time we will investigate how the GTR link training changes affect SATA in 2020.1.
May I ask what other issues needed fixing in the devicetree?
Hi, I'm using 2019.2 and I'm facing the exact same problem. Do you have a fix for this or the only way is to go back to 2019.1?
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Hi!
I would like to make a custom Linux image using buildroot to load on the Genesys ZU. However, I can't find the device tree file, I understand that it is autogenerated by Petalinux, but I don't have access to it. Could anyone provide me with this file?
It'd also would be nice to upstream it to the linux kernel, as happens with the Xilinx boards zc1232, zc1254, etc
Thanks!
Genesys ZU-3EG SATA and Petalinux
in FPGA
Posted
Hi Daniel
I think I fixed that long time ago, but I've been out of service for a few months. Please check out this device tree, which, IIRC, will let you use mSATA. Your best bet is to compare against yours the sections related to PCIe and mSATA, don't use this DTS blindly as we don't know if it'll work perfectly with your set up.
GenesysZU.dts