Mustafa
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Posts posted by Mustafa
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1 hour ago, zygot said:
What does the schematic tell you about Vccio that powered the IO bank for the pins connected to JA and JB?
What does the Series 7 Select IO User Guide tell you about the available IOSTANDARD types that can be used for signals connected to an IO bank powered by Vccio for the Genesys2 PMOD connectors?
It's Kintex-7. PMOD JA & JB are connected to bank 14
I depended only on Diligent documentation
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I have a project that uses external pll to generate clock. I'm routing this clock through diff buffer. I want to make the clock an output from PMOD connector.
I've used JB( in gensys2 manual JA& JB if you want to have differential signals). IOSTANDARD is LVDS_25.
I've used ILA ( integrated logic analyzer) and was successfully see my clock signal. BUT I see nothing when connecting Oscilloscope to pmod.
Gensys2 diff clock route to pmod
in FPGA
Posted
@artvvb ooh , So Gensys2 cannot provide DS on PMOD.. Please what are the methods to drive DS outside Gensys2?