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Manan Joshi

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  1. @artvvb hello arthur once again thank you for helping me out. I have done the pin mapping on the J63 & J62 PMOD headers after which i was able to generate the bitstream successfully. Another problem which i am facing right now is after writing the code in SDK and generating boot image. My sensor is reading -273.15 degree celsius, which i think is due to error in sdk code. if possible would you please help me out? I have attached the pin mapping photo & also the .txt file of the code. Regards, Manan Joshi code.txt
  2. hello @artvvb, thanks for reaching out. I had accidently add just the "pmods" folder instead of vivado_library folder. So the pmod_out issue has been rectified & thank you for pointing out the mistake. Also i had another query if you please don't mind. I have completed the block design and also synthesized the design, now when i open the synthesized design for i/o planning the Pmod_out_8473 is showing 8 scalar ports which need to be assigned. Now i have checked in the schematic file of zc702 there aren't 8 pmod ports. would you please help me out with this if you can.
  3. I am using Zynq ZC702 board for this project, also this is my first time using pmod sensor. getting this critical warning while adding ip: create_bd_cell -type ip -vlnv digilentinc.com:IP:PmodTMP3:1.0 PmodTMP3_0 CRITICAL WARNING: [BD 41-51] Could not find bus definition for the interface: Pmod_out CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: Pmod_out endgroup Getting this error while applying external connection to the "pmod out" pin: ERROR: [BD 5-106] Arguments to the connect_bd_intf_net command cannot be empty. ERROR: [Common 17-39] 'connect_bd_intf_net' failed due to earlier errors. Do i need to individually out every single out pins or either the ip is not compatible with vivado 2016.1?
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