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Agustinus

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Everything posted by Agustinus

  1. @zygot Thank you for your kind advice. I am a newcomer to FPGA development work. So finding some support materials that help me to learn FPGA quickly is really a matter. If the free version of Quartus is generally fine for Cyclone V device/DE-10 standard development board, then I will take the chance. I can follow some tutorials and examples provided in the bundle. If the ARM core can be utilized to post-process the outcomes of calculation by FPGA, I do not think I need to use NVidia Jetson for doing the same work. But, as you said, I need to expect some complication in the process. I understand the uncertainty. Anyhow, I need to start experiencing FPGA 'programming' work somehow. I will share the progress later. Thank you.
  2. @zygot Thank you for your kind suggestion. In deed, I reconsidered my choise after seeing posible complication when changing the vendor. So, I decided to buy the Terasic DE-10 Standard Development Board. I am expecting to stick on it for good. Best regards.
  3. @zygot @asmi Thank you so much for the constructive feedbacks, I surely do some follow-ups. Regarding your comments, yes, the input-output process is following a FIFO rule. I am also considering to reduce the output data rate which is an image stream, i.e., by selecting optimum frame rate and resolution. For the post-processing, I will use Nvidia/Jetson Xavier development board. I like the idea to start quick prototyping with DE0-CV/Cyclone V development board. I will connect it to a couple of PDM/TDM converter boards. I hope it can help me to be familiar with FPGA ‘programming’. Later, I will move to the ARTIX 7 to simulate large matrix multiplication. Then, after feeling confident, I will develop the daughterboard. I will share you the progress after a while. Best regards
  4. @zygot @asmi Thank you for sparing your precious time to provide me some answers. I would like to elaborate my working plan. About the sensor side, I found a way to group 16 PDM microphones into one TDM/PCM stream. That means, the FPGA platform would be needed to provide 3 pins per group of 16 microphones, resulting a total of 24 pins for 128 microphones. Another thing that would be required to be performed in the FPGA platform is to rearrange/demultiplex each TDM/PCM stream into 16 separate input data. The device that is used to make a group of microphones will be useful to reduce wiring complexity and to help maintaining signal integrity, including the CLK distribution and data buffering. About the daughterboard, I do not think there is a way to avoid it. I will design a daughterboard and fabricate it. About the processed data that the FPGA logic produces, I like to stream it out to a GPU or MCU for post-processing and presentation (e.g. save the result to file, show it on the display). I would dedicate FPGA platform only to process raw data because it involves large matrix multiplications. Frankly speaking, I do not know if Diligent has a matching FPGA development board in their inventory. I would be happy to try one you like to recommend, maybe one that has a FMC connector. I guess it would provide multiple I2S interfaces (8 channels, 24 pins), bit clock at 49.152 MHz (16 slot per-stream, 32 bit per-slot, sampling rate 96kHz), compatible L/R clock (with 50/50 duty cycle), and programming environment that allow direct access to input data/stream and memory/shift-registers. I look forward to hearing from you again. Thank you.
  5. @asmi @zygot @JColvin Thank you for your kind responses, appreciated :) I am sorry for the lack of details. Let me start by answering the questions: 1. Data source - How are you going to do the capture? Is it going to be a crap ton of ADCs, or some fast multichannel ADCs, or maybe something else? I am planning to use PDM MEMS microphones and group every 8 PDM signals into 1 TDM signal. I am not sure if there is one that can convert 16 PDM signals to 1 TDM signal, maybe I can tristate two TDM signals into one output stream. 2. Data input - Whatever you settle on in (1), how this data is going to be fed into FPGA? SPI, I2S, or some custom bus? This will help you determine which and how many pins will you require from FPGA, which can disqualify a lot of FPGA boards because they won't have suitable connectivity. I think I2S interface would be a good for TDM signal. However, the number of I2S interfaces would be limited. If 128 sensor is too many, I guess I can lower the number to 64 sensors. I wish there is an alternative to follow. I am open for any suggestion. 3. Data processing - Once the question if bringing data into FPGA is resolved, what exactly are you going to do with that data inside FPGA? That has a major implications on a FPGA family and density that you require. One reason to work with the FPGA is to bring large matrix calculations. The input data contains information of amplitude, time, and position. Therefore, it should be put in the shift registers and arranged in a matrix that represents spatial distribution. Then matrix multiplications are performed to fit the data into the model which is representated by multiple transfer function matrices. 4. Data output - And finally, once you've done all the processing inside FPGA, what are going to be your outputs? This again can disqualify some boards because they lack the output method of your choice. I like to stream out the output to a MCU or GPU that further processes the output data and presents it as the final output format. Here are my responses for the other comments In general Digilent FPGA boards are designed to support their PMOD ecosystem, and are IO pin deficient. They do sell a couple of boards with 1 FMC connector but finding an off-the-shelf mezzanine card that supports 128 undefined sensors is going to be a problem. Even if you can list all of the exact sensors by part number an answer is not likely to be a simple one. You are right, I do not think PMOD ecosystem is sufficient. I am actually considering the FMC connector because I found a commercial product (with xylinx FPGA board) that manages to handle +100 sensors with a couple of FMC connectors. But, I really want to avoid design complexity. What do you think about SYZYGY connector? Usually, for low Fs, multiple channel ADC applications, analog inputs to the sampler(s) are time mutiplexed. Are you prepared to do some digital and analog design and prototype construction? I guess I could not avoid multiplexing and demultiplexing. I want to groups some sensors to simplify prototype structure; for that reason I choose PDM-based sensor and PDM to TDM signal converters. @zzzhhh Thank you for your recommendation. I will check the Arty A7-100T.
  6. Hi, I am looking for an FPGA platform for a large sensor array system. I would like to hear your recommendation for an optimal evaluation board, and probably with a compatible extension board, that can accomodate 128 sensors working at sampling frequency of 96kHz. I wish you would be happy to provide me some options. I look forward to hearing from you. Thank you in advance.
  7. Greetings, I am 'somewhat green' to FPGA programming, but I want to learn how to program an FPGA platform for a large sensor array system. I would like to hear your recommendation for an optimal evaluation board, and probably with a compatible extension board, that can accomodate 128 sensors working at sampling frequency of 96kHz. I wish you would be happy to provide me some options. I look forward to hearing from you. Thank you in advance.
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