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prudhvi

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Everything posted by prudhvi

  1. hi @artvvb Thanks for helping me to complete my project. 👍
  2. sir, I am using Xilinx vivado. My project is Parallel Prefix Adder(PPA). I have a problem with my project while dumping code. I have FPGA board of Artix7 it has 4 inputs and 4 outputs In our project there is 32 bits input and 17 bits output. My problem is how to dump my project into Artix7 FPGA board Already try to dump my project but i got a problem while running a Bitstream. I want a help with process of how to dump 32bit i/p into 4bit Artix7 board. I just want check my project power, delay, LUTs. Please help me with this problem
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