Nexys 4 Test Speed DDR Memory With MIG and Vivado in FPGA Posted March 16, 2023 I want to measure the data transmission speed between the DDR memory and the Artix 7 on the Nexys 4 board. I can design the memory interface with MIG (from the IP Catalog in Vivado). But after that, I don't know how write or run a test for this block.
Nexys 4 Test Speed DDR Memory With MIG and Vivado
in FPGA
Posted
I want to measure the data transmission speed between the DDR memory and the Artix 7 on the Nexys 4 board.
I can design the memory interface with MIG (from the IP Catalog in Vivado). But after that, I don't know how write or run a test for this block.