Selly
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Hi,
we are in the process of developing an evaluation board for our own ARC based SoC. To be able to debug, we use a Digilent JTAG-HS2 cable with FTDI chip. However, we would like to integrate the debug interface into the hardware. To do this we need firstly Digilent's permission and secondly the EEprom configuration of the FTDI FT232H chip. Can you help us here?
Thanks,
Andreas
JTAG-HS2 eeprom configuration
in FPGA
Posted
Hi JColvin,
Thank you for your fast help ! :-)
I'm in contact with Digilent.
Thanks,
Andreas