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Nakazawa

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  1. I would like to confirm whether the configuration of "PCIe + 10G Ethernet *2 + DDR3 *2 + QDR" is possible. Below is the evaluation board, configuration, background of the question, and the question. 

     

    [1] Evaluation board

    NetFPGA-SUME (family: Virtex-7 (*Note), model number: XC7V690T FFG1761-3)

     

    [2] Desired configuration

    PCIe + 10G Ethernet *2 + DDR3 *2 + QDR  

    For DDR3 and QDR, the following settings are currently being used.

    DDR A=IC27, DDR B=IC28, QDR B=IC29 (Unused: QDR A = IC26, QDR C = IC30)

     

    [3]Current situation and problems

    (1)The problem was that the configuration I wanted to achieve did not recognize PCIe.

    •  PCIe + 10GEth * 2 + DDR3 * 2 + QDR configuration does not recognize PCIe

    (2)Next, we are trying the following as a separation.

    • PCIe + 10GEth*2 configuration: PCIe recognition
    • PCIe + 10GEth*2 + DDR3*2 configuration: PCIe not recognized

    (3)In addition, since the clock routing causes an error, the error is downgraded to a warning with the following settings (described in xdc)

    • # Restrictions on the clock system Various settings for set_property CLOCK_DEDICATED_ROUTE FALSE/ANY_CMT_COLUMN/BACKBONE

    (4)As a reference, we are changing to BUFH due to lack of BUFG. (It is not the supply clock to each part above)

     

    [4]Questions

    (1) Do you have a track record of operating the evaluation board "NetFPGA-SUME" with the combination of the above configurations?

    (2) Are there any combinations of configurations that you want to achieve that are impossible? For example, PCIe + DDR3 cannot be used simultaneously due to pin assignments, etc.

     

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