DiegoGM

I'm having the same issue with my Pmod DHB1. This issue is not addressed anywhere else, as far as I can tell. @DaveG, were you able to solve the problem you encountered? I'd appreciate very much you reply this message. Cheers!

Thanks so much, @zygot I'll certainly check this HDL design flow example you shared with me. I noticed that I wasn't clear enough with my question. What I mean is, is it possible to use an ILA with the zybo-7020 board because it does not have a JTAG-HS3 port, only a micro USB port (UART, JTAG). I have a working design in the PL to capture that includes an ILA. I generated a bitstream and attempted to program the FPGA from Hardware Manager using the bitstream file (.bit) and the debug probes file (.ltx); however, the Hardware Manager states that there are no debug cores despite the fact that there is a debug probes file that I select when attempting to program the FPGA. Please see the picture attached for clarification. So I thought that I may need to use JTAG-HS3 programming cable / debugger in order to configure the ILA with the .ltx file. Is this assumption correct? I look forward to hearing from you.

Hi Digilent Community, Is it possible to use ILA cores on the Zybo z7-20? If it is possible, how do you do that? I look forward to hearing from you. Cheers! Diego